Lines Matching refs:mode
71 neg_const_int (enum machine_mode mode, rtx i)
73 return gen_int_mode (- INTVAL (i), mode);
77 the most significant bit of machine mode MODE. */
80 mode_signbit_p (enum machine_mode mode, rtx x)
85 if (GET_MODE_CLASS (mode) != MODE_INT)
88 width = GET_MODE_BITSIZE (mode);
115 simplify_gen_binary (enum rtx_code code, enum machine_mode mode, rtx op0,
121 tem = simplify_binary_operation (code, mode, op0, op1);
130 return gen_rtx_fmt_ee (code, mode, op0, op1);
190 /* If we're accessing the constant in a different mode than it was
219 simplify_gen_unary (enum rtx_code code, enum machine_mode mode, rtx op,
225 if ((tem = simplify_unary_operation (code, mode, op, op_mode)) != 0)
228 return gen_rtx_fmt_e (code, mode, op);
234 simplify_gen_ternary (enum rtx_code code, enum machine_mode mode,
240 if (0 != (tem = simplify_ternary_operation (code, mode, op0_mode,
244 return gen_rtx_fmt_eee (code, mode, op0, op1, op2);
248 CMP_MODE specifies mode comparison is done in. */
251 simplify_gen_relational (enum rtx_code code, enum machine_mode mode,
256 if (0 != (tem = simplify_relational_operation (code, mode, cmp_mode,
260 return gen_rtx_fmt_ee (code, mode, op0, op1);
271 enum machine_mode mode = GET_MODE (x);
290 return simplify_gen_unary (code, mode, op0, op_mode);
298 return simplify_gen_binary (code, mode, op0, op1);
309 return simplify_gen_relational (code, mode, op_mode, op0, op1);
322 return simplify_gen_ternary (code, mode, op_mode, op0, op1, op2);
357 return gen_rtx_LO_SUM (mode, op0, op1);
373 /* Try to simplify a unary operation CODE whose output mode is to be
374 MODE with input operand OP whose mode was originally OP_MODE.
377 simplify_unary_operation (enum rtx_code code, enum machine_mode mode,
387 tem = simplify_const_unary_operation (code, mode, trueop, op_mode);
391 return simplify_unary_operation_1 (code, mode, op);
397 simplify_unary_operation_1 (enum rtx_code code, enum machine_mode mode, rtx op)
412 && (mode == BImode || STORE_FLAG_VALUE == -1)
414 return simplify_gen_relational (reversed, mode, VOIDmode,
420 return simplify_gen_unary (NEG, mode, XEXP (op, 0), mode);
429 && (temp = simplify_unary_operation (NOT, mode,
430 XEXP (op, 1), mode)) != 0)
431 return simplify_gen_binary (XOR, mode, XEXP (op, 0), temp);
436 && mode_signbit_p (mode, XEXP (op, 1))
437 && (temp = simplify_unary_operation (NOT, mode,
438 XEXP (op, 1), mode)) != 0)
439 return simplify_gen_binary (XOR, mode, XEXP (op, 0), temp);
450 temp = simplify_gen_unary (NOT, mode, const1_rtx, mode);
451 return simplify_gen_binary (ROTATE, mode, temp, XEXP (op, 1));
461 && INTVAL (XEXP (op, 1)) == GET_MODE_BITSIZE (mode) - 1)
462 return simplify_gen_relational (GE, mode, VOIDmode,
480 return rtl_hooks.gen_lowpart_no_emit (mode, x);
498 op_mode = mode;
508 mode, in1, in2);
520 return simplify_gen_unary (NOT, mode, XEXP (op, 0), mode);
529 rounding mode is towards +infinity (or -infinity) then the two
532 && !HONOR_SIGNED_ZEROS (mode)
533 && !HONOR_SIGN_DEPENDENT_ROUNDING (mode))
534 return simplify_gen_binary (MINUS, mode, XEXP (op, 1), XEXP (op, 0));
537 && !HONOR_SIGNED_ZEROS (mode)
538 && !HONOR_SIGN_DEPENDENT_ROUNDING (mode))
544 temp = simplify_unary_operation (NEG, mode, XEXP (op, 1), mode);
546 return simplify_gen_binary (MINUS, mode, temp, XEXP (op, 0));
550 temp = simplify_gen_unary (NEG, mode, XEXP (op, 0), mode);
551 return simplify_gen_binary (MINUS, mode, temp, XEXP (op, 1));
557 && !HONOR_SIGN_DEPENDENT_ROUNDING (mode))
559 temp = simplify_gen_unary (NEG, mode, XEXP (op, 0), mode);
560 return simplify_gen_binary (MULT, mode, temp, XEXP (op, 1));
568 temp = simplify_unary_operation (NEG, mode, XEXP (op, 0), mode);
570 return simplify_gen_binary (ASHIFT, mode, temp, XEXP (op, 1));
577 && INTVAL (XEXP (op, 1)) == GET_MODE_BITSIZE (mode) - 1)
578 return simplify_gen_binary (LSHIFTRT, mode,
585 && INTVAL (XEXP (op, 1)) == GET_MODE_BITSIZE (mode) - 1)
586 return simplify_gen_binary (ASHIFTRT, mode,
592 && nonzero_bits (XEXP (op, 0), mode) == 1)
607 if (mode == inner)
609 if (GET_MODE_BITSIZE (mode) > isize)
610 return simplify_gen_unary (SIGN_EXTEND, mode, temp, inner);
611 return simplify_gen_unary (TRUNCATE, mode, temp, inner);
617 if (mode == inner)
619 if (GET_MODE_BITSIZE (mode) > isize)
620 return simplify_gen_unary (ZERO_EXTEND, mode, temp, inner);
621 return simplify_gen_unary (TRUNCATE, mode, temp, inner);
627 /* We can't handle truncation to a partial integer mode here
629 integer mode. */
630 if (GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
636 && GET_MODE (XEXP (op, 0)) == mode)
645 && GET_MODE (XEXP (XEXP (op, 0), 0)) == mode)
646 return simplify_gen_unary (GET_CODE (op), mode,
647 XEXP (XEXP (op, 0), 0), mode);
654 return simplify_gen_unary (TRUNCATE, mode, XEXP (SUBREG_REG (op), 0),
664 if ((TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (mode),
668 - GET_MODE_BITSIZE (mode)))
669 : truncated_to_mode (mode, op))
672 return rtl_hooks.gen_lowpart_no_emit (mode, op);
676 but it works even if the comparison is done in a mode larger
678 if (GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT
680 && ((HOST_WIDE_INT) STORE_FLAG_VALUE & ~GET_MODE_MASK (mode)) == 0)
681 return rtl_hooks.gen_lowpart_no_emit (mode, op);
685 if (DECIMAL_FLOAT_MODE_P (mode))
690 && GET_MODE (XEXP (op, 0)) == mode)
707 > GET_MODE_SIZE (mode)
709 mode,
710 XEXP (op, 0), mode);
719 return simplify_gen_unary (FLOAT, mode,
728 && GET_MODE (XEXP (XEXP (op, 0), 0)) == mode)
729 return simplify_gen_unary (GET_CODE (op), mode,
730 XEXP (XEXP (op, 0), 0), mode);
741 if (DECIMAL_FLOAT_MODE_P (mode))
755 return simplify_gen_unary (GET_CODE (op), mode,
764 return simplify_gen_unary (ABS, mode, XEXP (op, 0),
767 /* If the mode of the operand is VOIDmode (i.e. if it is ASM_OPERANDS),
783 if (num_sign_bit_copies (op, mode) == GET_MODE_BITSIZE (mode))
784 return gen_rtx_NEG (mode, op);
792 return simplify_gen_unary (FFS, mode, XEXP (op, 0),
800 return simplify_gen_unary (code, mode, XEXP (op, 0),
807 return simplify_gen_unary (FLOAT, mode, XEXP (op, 0),
813 becomes just the MINUS if its mode is MODE. This allows
817 && GET_MODE (XEXP (op, 0)) == mode
825 target mode is the same as the variable's promotion. */
829 && GET_MODE (XEXP (op, 0)) == mode)
834 && mode == Pmode && GET_MODE (op) == ptr_mode
847 target mode is the same as the variable's promotion. */
851 && GET_MODE (XEXP (op, 0)) == mode)
856 && mode == Pmode && GET_MODE (op) == ptr_mode
873 /* Try to compute the value of a unary operation CODE whose output mode is to
874 be MODE with input operand OP whose mode was originally OP_MODE.
877 simplify_const_unary_operation (enum rtx_code code, enum machine_mode mode,
880 unsigned int width = GET_MODE_BITSIZE (mode);
884 gcc_assert (VECTOR_MODE_P (mode));
888 gcc_assert (GET_MODE_INNER (mode) == GET_MODE (op));
890 gcc_assert (GET_MODE_INNER (mode) == GET_MODE_INNER
896 int elt_size = GET_MODE_SIZE (GET_MODE_INNER (mode));
897 unsigned n_elts = (GET_MODE_SIZE (mode) / elt_size);
915 return gen_rtx_CONST_VECTOR (mode, v);
919 if (VECTOR_MODE_P (mode) && GET_CODE (op) == CONST_VECTOR)
921 int elt_size = GET_MODE_SIZE (GET_MODE_INNER (mode));
922 unsigned n_elts = (GET_MODE_SIZE (mode) / elt_size);
932 rtx x = simplify_unary_operation (code, GET_MODE_INNER (mode),
939 return gen_rtx_CONST_VECTOR (mode, v);
943 check the wrong mode (input vs. output) for a conversion operation,
957 REAL_VALUE_FROM_INT (d, lv, hv, mode);
958 d = real_value_truncate (mode, d);
959 return CONST_DOUBLE_FROM_REAL_VALUE (d, mode);
985 REAL_VALUE_FROM_UNSIGNED_INT (d, lv, hv, mode);
986 d = real_value_truncate (mode, d);
987 return CONST_DOUBLE_FROM_REAL_VALUE (d, mode);
1013 arg0 &= GET_MODE_MASK (mode);
1018 arg0 &= GET_MODE_MASK (mode);
1019 if (arg0 == 0 && CLZ_DEFINED_VALUE_AT_ZERO (mode, val))
1022 val = GET_MODE_BITSIZE (mode) - floor_log2 (arg0) - 1;
1026 arg0 &= GET_MODE_MASK (mode);
1031 if (! CTZ_DEFINED_VALUE_AT_ZERO (mode, val))
1032 val = GET_MODE_BITSIZE (mode);
1039 arg0 &= GET_MODE_MASK (mode);
1046 arg0 &= GET_MODE_MASK (mode);
1062 original mode. */
1066 /* If we were really extending the mode,
1080 op_mode = mode;
1083 /* If we were really extending the mode,
1113 return gen_int_mode (val, mode);
1165 lv = GET_MODE_BITSIZE (mode) - floor_log2 (h1) - 1
1168 lv = GET_MODE_BITSIZE (mode) - floor_log2 (l1) - 1;
1169 else if (! CLZ_DEFINED_VALUE_AT_ZERO (mode, lv))
1170 lv = GET_MODE_BITSIZE (mode);
1179 else if (! CTZ_DEFINED_VALUE_AT_ZERO (mode, lv))
1180 lv = GET_MODE_BITSIZE (mode);
1203 /* This is just a change-of-mode, so do nothing. */
1240 return immed_double_const (lv, hv, mode);
1244 && SCALAR_FLOAT_MODE_P (mode))
1252 if (HONOR_SNANS (mode) && real_isnan (&d))
1254 real_sqrt (&t, mode, &d);
1264 d = real_value_truncate (mode, d);
1267 /* All this does is change the mode. */
1280 real_from_target (&d, tmp, mode);
1286 return CONST_DOUBLE_FROM_REAL_VALUE (d, mode);
1291 && GET_MODE_CLASS (mode) == MODE_INT
1386 return immed_double_const (xl, xh, mode);
1394 associative binary operation CODE with result mode MODE, operating
1400 simplify_associative_operation (enum rtx_code code, enum machine_mode mode,
1411 tem = simplify_gen_binary (code, mode, op0, XEXP (op1, 0));
1412 return simplify_gen_binary (code, mode, tem, XEXP (op1, 1));
1417 return simplify_gen_binary (code, mode, op1, op0);
1429 tem = simplify_gen_binary (code, mode, XEXP (op0, 0), op1);
1430 return simplify_gen_binary (code, mode, tem, XEXP (op0, 1));
1435 ? simplify_binary_operation (code, mode, op1, XEXP (op0, 1))
1436 : simplify_binary_operation (code, mode, XEXP (op0, 1), op1);
1438 return simplify_gen_binary (code, mode, XEXP (op0, 0), tem);
1442 ? simplify_binary_operation (code, mode, op1, XEXP (op0, 0))
1443 : simplify_binary_operation (code, mode, XEXP (op0, 0), op1);
1445 return simplify_gen_binary (code, mode, tem, XEXP (op0, 1));
1452 /* Simplify a binary operation CODE with result mode MODE, operating on OP0
1458 simplify_binary_operation (enum rtx_code code, enum machine_mode mode,
1464 /* Relational operations don't work here. We must know the mode
1481 tem = simplify_const_binary_operation (code, mode, trueop0, trueop1);
1484 return simplify_binary_operation_1 (code, mode, op0, op1, trueop0, trueop1);
1488 CODE with result mode MODE, operating on OP0 and OP1. If OP0 and/or
1493 simplify_binary_operation_1 (enum rtx_code code, enum machine_mode mode,
1498 unsigned int width = GET_MODE_BITSIZE (mode);
1508 when x is -0 and the rounding mode is not towards -infinity,
1510 if (!HONOR_SIGNED_ZEROS (mode) && trueop1 == CONST0_RTX (mode))
1516 return simplify_gen_binary (MINUS, mode, op1, XEXP (op0, 0));
1518 return simplify_gen_binary (MINUS, mode, op0, XEXP (op1, 0));
1521 if (INTEGRAL_MODE_P (mode)
1524 return simplify_gen_unary (NEG, mode, XEXP (op0, 0), mode);
1545 if (SCALAR_INT_MODE_P (mode))
1599 rtx orig = gen_rtx_PLUS (mode, op0, op1);
1605 coeff = immed_double_const (l, h, mode);
1607 tem = simplify_gen_binary (MULT, mode, lhs, coeff);
1619 && mode_signbit_p (mode, op1))
1620 return simplify_gen_binary (XOR, mode, XEXP (op0, 0),
1621 simplify_gen_binary (XOR, mode, op1,
1632 return simplify_gen_binary (MINUS, mode, op1,
1633 simplify_gen_binary (MULT, mode,
1643 && (reversed = reversed_comparison (op0, mode)))
1645 simplify_gen_unary (NEG, mode, reversed, mode);
1653 if (INTEGRAL_MODE_P (mode)
1656 && (tem = simplify_plus_minus (code, mode, op0, op1)) != 0)
1661 if (FLOAT_MODE_P (mode)
1664 tem = simplify_associative_operation (code, mode, op0, op1);
1679 || ! FLOAT_MODE_P (mode) || flag_unsafe_math_optimizations)
1680 && trueop1 == CONST0_RTX (mode))
1711 && (! FLOAT_MODE_P (mode) || flag_unsafe_math_optimizations))
1712 return CONST0_RTX (mode);
1716 But if the mode has signed zeros, and does not round towards
1718 if (!HONOR_SIGNED_ZEROS (mode) && trueop0 == CONST0_RTX (mode))
1719 return simplify_gen_unary (NEG, mode, op1, mode);
1723 return simplify_gen_unary (NOT, mode, op1, mode);
1725 /* Subtracting 0 has no effect unless the mode has signed zeros
1728 if (!(HONOR_SIGNED_ZEROS (mode)
1729 && HONOR_SIGN_DEPENDENT_ROUNDING (mode))
1730 && trueop1 == CONST0_RTX (mode))
1739 if (SCALAR_INT_MODE_P (mode))
1793 rtx orig = gen_rtx_MINUS (mode, op0, op1);
1799 coeff = immed_double_const (l, h, mode);
1801 tem = simplify_gen_binary (MULT, mode, lhs, coeff);
1809 return simplify_gen_binary (PLUS, mode, op0, XEXP (op1, 0));
1816 tem = simplify_unary_operation (NEG, mode, op1, mode);
1818 return simplify_gen_binary (MINUS, mode, tem, XEXP (op0, 0));
1823 return simplify_gen_binary (PLUS, mode,
1825 neg_const_int (mode, op1));
1832 tem = simplify_gen_unary (NOT, mode, XEXP (op1, 1),
1834 return simplify_gen_binary (AND, mode, op0, tem);
1838 tem = simplify_gen_unary (NOT, mode, XEXP (op1, 0),
1840 return simplify_gen_binary (AND, mode, op0, tem);
1849 && (reversed = reversed_comparison (op1, mode)))
1860 return simplify_gen_binary (PLUS, mode,
1861 simplify_gen_binary (MULT, mode,
1873 in1 = simplify_gen_unary (NEG, mode, XEXP (op1, 0), mode);
1875 return simplify_gen_binary (MINUS, mode,
1876 simplify_gen_binary (MULT, mode,
1888 if (INTEGRAL_MODE_P (mode)
1891 && (tem = simplify_plus_minus (code, mode, op0, op1)) != 0)
1897 return simplify_gen_unary (NEG, mode, op0, mode);
1901 when the mode has signed zeros, since multiplying a negative
1903 if (!HONOR_NANS (mode)
1904 && !HONOR_SIGNED_ZEROS (mode)
1905 && trueop1 == CONST0_RTX (mode)
1911 if (!HONOR_SNANS (mode)
1912 && trueop1 == CONST1_RTX (mode))
1919 /* If the mode is larger than the host word size, and the
1924 return simplify_gen_binary (ASHIFT, mode, op0, GEN_INT (val));
1930 && GET_MODE (op0) == mode
1933 return simplify_gen_binary (ASHIFT, mode, op0,
1939 && GET_MODE (op0) == mode)
1945 return simplify_gen_binary (PLUS, mode, op0, copy_rtx (op0));
1947 if (!HONOR_SNANS (mode)
1949 return simplify_gen_unary (NEG, mode, op0, mode);
1953 if (FLOAT_MODE_P (mode)
1958 return simplify_gen_binary (MULT, mode, XEXP (op0, 0), XEXP (op1, 0));
1961 if (SCALAR_FLOAT_MODE_P (mode)
1966 return simplify_gen_binary (MULT, mode, XEXP (op0, 0), XEXP (op1, 0));
1970 if (! FLOAT_MODE_P (mode)
1973 tem = simplify_associative_operation (code, mode, op0, op1);
1983 && ((INTVAL (trueop1) & GET_MODE_MASK (mode))
1984 == GET_MODE_MASK (mode)))
1992 && SCALAR_INT_MODE_P (mode))
1997 && GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT
1998 && (nonzero_bits (op0, mode) & ~INTVAL (op1)) == 0)
2010 mode size to (rotate A CX). */
2029 == GET_MODE_BITSIZE (mode)))
2030 return gen_rtx_ROTATE (mode, XEXP (opright, 0), XEXP (opleft, 1));
2032 /* Same, but for ashift that has been "simplified" to a wider mode
2048 == GET_MODE_BITSIZE (mode)))
2049 return gen_rtx_ROTATE (mode, XEXP (opright, 0),
2055 && (GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT
2061 return simplify_gen_binary (IOR, mode,
2063 (AND, mode, XEXP (op0, 0),
2083 && (mask & nonzero_bits (XEXP (op0, 0), mode)) == 0)
2084 return simplify_gen_binary (ASHIFTRT, mode,
2089 tem = simplify_associative_operation (code, mode, op0, op1);
2098 && ((INTVAL (trueop1) & GET_MODE_MASK (mode))
2099 == GET_MODE_MASK (mode)))
2100 return simplify_gen_unary (NOT, mode, op0, mode);
2103 && GET_MODE_CLASS (mode) != MODE_CC)
2104 return CONST0_RTX (mode);
2109 && mode_signbit_p (mode, op1))
2110 return simplify_gen_binary (PLUS, mode, op0, op1);
2117 && mode_signbit_p (mode, XEXP (op0, 1)))
2118 return simplify_gen_binary (XOR, mode, XEXP (op0, 0),
2119 simplify_gen_binary (XOR, mode, op1,
2126 if (GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT
2127 && (nonzero_bits (op0, mode)
2128 & nonzero_bits (op1, mode)) == 0)
2129 return (simplify_gen_binary (IOR, mode, op0, op1));
2143 return simplify_gen_binary (XOR, mode, op0, op1);
2145 return simplify_gen_unary (NOT, mode,
2146 simplify_gen_binary (XOR, mode, op0, op1),
2147 mode);
2157 return simplify_gen_binary (AND, mode,
2158 simplify_gen_unary (NOT, mode,
2159 XEXP (op0, 0), mode),
2165 return simplify_gen_binary (AND, mode,
2166 simplify_gen_unary (NOT, mode,
2167 XEXP (op0, 1), mode),
2175 && (reversed = reversed_comparison (op0, mode)))
2186 && INTVAL (XEXP (op0, 1)) == GET_MODE_BITSIZE (mode) - 1)
2187 return gen_rtx_GE (mode, XEXP (op0, 0), const0_rtx);
2191 if (GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT
2192 && ((STORE_FLAG_VALUE & GET_MODE_MASK (mode))
2193 == (unsigned HOST_WIDE_INT) 1 << (GET_MODE_BITSIZE (mode) - 1))
2196 && (reversed = reversed_comparison (op0, mode)))
2201 tem = simplify_associative_operation (code, mode, op0, op1);
2207 if (trueop1 == CONST0_RTX (mode) && ! side_effects_p (op0))
2212 && GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT
2213 && (nonzero_bits (trueop0, mode) & ~INTVAL (trueop1)) == 0)
2216 && GET_MODE_CLASS (mode) != MODE_CC)
2222 && GET_MODE_CLASS (mode) != MODE_CC)
2223 return CONST0_RTX (mode);
2226 there are no nonzero bits of C outside of X's mode. */
2230 && GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT
2238 return simplify_gen_unary (ZERO_EXTEND, mode, tem, imode);
2246 return simplify_gen_binary (AND, mode,
2247 simplify_gen_unary (NOT, mode,
2248 XEXP (op0, 1), mode),
2254 return simplify_gen_binary (AND, mode,
2255 simplify_gen_unary (NOT, mode,
2256 XEXP (op0, 0), mode),
2264 return simplify_gen_binary (AND, mode, XEXP (XEXP (op0, 0), 1), op1);
2270 return simplify_gen_binary (AND, mode, XEXP (XEXP (op0, 0), 0), op1);
2286 && GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT
2321 tem = simplify_gen_binary (GET_CODE (op0), mode,
2323 return simplify_gen_binary (code, mode, tem, op1);
2326 tem = simplify_associative_operation (code, mode, op0, op1);
2333 if (trueop0 == CONST0_RTX (mode))
2336 return simplify_gen_binary (AND, mode, op1, trueop0);
2340 if (trueop1 == CONST1_RTX (mode))
2341 return rtl_hooks.gen_lowpart_no_emit (mode, op0);
2345 return simplify_gen_binary (LSHIFTRT, mode, op0, GEN_INT (val));
2350 if (SCALAR_FLOAT_MODE_P (mode))
2356 if (trueop0 == CONST0_RTX (mode)
2357 && !HONOR_NANS (mode)
2358 && !HONOR_SIGNED_ZEROS (mode)
2362 if (trueop1 == CONST1_RTX (mode)
2363 && !HONOR_SNANS (mode))
2367 && trueop1 != CONST0_RTX (mode))
2374 && !HONOR_SNANS (mode))
2375 return simplify_gen_unary (NEG, mode, op0, mode);
2383 tem = CONST_DOUBLE_FROM_REAL_VALUE (d, mode);
2384 return simplify_gen_binary (MULT, mode, op0, tem);
2391 if (trueop0 == CONST0_RTX (mode))
2394 return simplify_gen_binary (AND, mode, op1, trueop0);
2398 if (trueop1 == CONST1_RTX (mode))
2399 return rtl_hooks.gen_lowpart_no_emit (mode, op0);
2403 rtx x = rtl_hooks.gen_lowpart_no_emit (mode, op0);
2404 return simplify_gen_unary (NEG, mode, x, mode);
2411 if (trueop0 == CONST0_RTX (mode))
2414 return simplify_gen_binary (AND, mode, op1, trueop0);
2418 if (trueop1 == CONST1_RTX (mode))
2421 return simplify_gen_binary (AND, mode, op0, CONST0_RTX (mode));
2422 return CONST0_RTX (mode);
2427 return simplify_gen_binary (AND, mode, op0,
2433 if (trueop0 == CONST0_RTX (mode))
2436 return simplify_gen_binary (AND, mode, op1, trueop0);
2440 if (trueop1 == CONST1_RTX (mode) || trueop1 == constm1_rtx)
2443 return simplify_gen_binary (AND, mode, op0, CONST0_RTX (mode));
2444 return CONST0_RTX (mode);
2451 if (trueop1 == CONST0_RTX (mode))
2453 if (trueop0 == CONST0_RTX (mode) && ! side_effects_p (op1))
2457 && (unsigned HOST_WIDE_INT) INTVAL (trueop0) == GET_MODE_MASK (mode)
2464 if (trueop1 == CONST0_RTX (mode))
2466 if (trueop0 == CONST0_RTX (mode) && ! side_effects_p (op1))
2471 if (trueop1 == CONST0_RTX (mode))
2473 if (trueop0 == CONST0_RTX (mode) && ! side_effects_p (op1))
2487 return simplify_gen_relational (EQ, mode, imode,
2500 tem = simplify_associative_operation (code, mode, op0, op1);
2509 == (unsigned HOST_WIDE_INT) GET_MODE_MASK (mode) >> 1)
2514 tem = simplify_associative_operation (code, mode, op0, op1);
2520 if (trueop1 == CONST0_RTX (mode) && ! side_effects_p (op0))
2524 tem = simplify_associative_operation (code, mode, op0, op1);
2534 tem = simplify_associative_operation (code, mode, op0, op1);
2547 if (!VECTOR_MODE_P (mode))
2550 gcc_assert (mode == GET_MODE_INNER (GET_MODE (trueop0)));
2562 gcc_assert (GET_MODE_INNER (mode)
2568 int elt_size = GET_MODE_SIZE (GET_MODE_INNER (mode));
2569 unsigned n_elts = (GET_MODE_SIZE (mode) / elt_size);
2583 return gen_rtx_CONST_VECTOR (mode, v);
2592 int offset = INTVAL (XVECEXP (trueop1, 0, 0)) * GET_MODE_SIZE (mode);
2595 while (GET_MODE (vec) != mode
2609 if (GET_MODE (vec) == mode)
2618 : GET_MODE_INNER (mode));
2621 : GET_MODE_INNER (mode));
2623 gcc_assert (VECTOR_MODE_P (mode));
2625 == GET_MODE_SIZE (mode));
2628 gcc_assert (GET_MODE_INNER (mode)
2631 gcc_assert (GET_MODE_INNER (mode) == op0_mode);
2634 gcc_assert (GET_MODE_INNER (mode)
2637 gcc_assert (GET_MODE_INNER (mode) == op1_mode);
2646 int elt_size = GET_MODE_SIZE (GET_MODE_INNER (mode));
2647 unsigned n_elts = (GET_MODE_SIZE (mode) / elt_size);
2673 return gen_rtx_CONST_VECTOR (mode, v);
2686 simplify_const_binary_operation (enum rtx_code code, enum machine_mode mode,
2691 unsigned int width = GET_MODE_BITSIZE (mode);
2693 if (VECTOR_MODE_P (mode)
2698 unsigned n_elts = GET_MODE_NUNITS (mode);
2710 rtx x = simplify_binary_operation (code, GET_MODE_INNER (mode),
2718 return gen_rtx_CONST_VECTOR (mode, v);
2721 if (VECTOR_MODE_P (mode)
2725 unsigned n_elts = GET_MODE_NUNITS (mode);
2753 return gen_rtx_CONST_VECTOR (mode, v);
2756 if (SCALAR_FLOAT_MODE_P (mode)
2759 && mode == GET_MODE (op0) && mode == GET_MODE (op1))
2791 real_from_target (&r, tmp0, mode);
2792 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
2801 real_convert (&f0, mode, &f0);
2802 real_convert (&f1, mode, &f1);
2804 if (HONOR_SNANS (mode)
2810 && (flag_trapping_math || ! MODE_HAS_INFINITIES (mode)))
2813 if (MODE_HAS_INFINITIES (mode) && HONOR_NANS (mode)
2840 if (code == MULT && MODE_HAS_INFINITIES (mode) && HONOR_NANS (mode)
2850 real_convert (&result, mode, &value);
2856 && MODE_HAS_INFINITIES (mode)
2864 result may dependent upon the run-time rounding mode and
2869 || (REAL_MODE_FORMAT_COMPOSITE_P (mode)
2874 return CONST_DOUBLE_FROM_REAL_VALUE (result, mode);
2879 if (GET_MODE_CLASS (mode) == MODE_INT
2994 l2 &= (GET_MODE_BITSIZE (mode) - 1), h2 = 0;
2996 if (h2 != 0 || l2 >= GET_MODE_BITSIZE (mode))
3000 rshift_double (l1, h1, l2, GET_MODE_BITSIZE (mode), &lv, &hv,
3003 lshift_double (l1, h1, l2, GET_MODE_BITSIZE (mode), &lv, &hv, 1);
3005 lrotate_double (l1, h1, l2, GET_MODE_BITSIZE (mode), &lv, &hv);
3007 rrotate_double (l1, h1, l2, GET_MODE_BITSIZE (mode), &lv, &hv);
3014 return immed_double_const (lv, hv, mode);
3117 else if (arg1 < 0 || arg1 >= GET_MODE_BITSIZE (mode))
3181 return gen_int_mode (val, mode);
3223 simplify_plus_minus (enum rtx_code code, enum machine_mode mode, rtx op0,
3309 ops[i].op = neg_const_int (mode, this_op);
3338 lhs = gen_rtx_NEG (mode, ops[0].op);
3352 return simplify_const_binary_operation (code, mode, lhs, rhs);
3405 tem = simplify_binary_operation (ncode, mode, tem_lhs, tem_rhs);
3411 tem = simplify_binary_operation (ncode, mode, lhs, rhs);
3427 tem = neg_const_int (mode, tem), lneg = 0;
3453 return gen_rtx_fmt_ee (MINUS, mode, ops[1].op, ops[0].op);
3467 value = neg_const_int (mode, value);
3477 ops[0].op = gen_rtx_NEG (mode, ops[0].op);
3490 mode, result, ops[i].op);
3508 MODE is the mode of the result. If MODE is VOIDmode, both operands must
3511 CMP_MODE specifies in which mode the comparison is done in, so it is
3512 the mode of the operands. If CMP_MODE is VOIDmode, it is taken from
3516 simplify_relational_operation (enum rtx_code code, enum machine_mode mode,
3529 if (SCALAR_FLOAT_MODE_P (mode))
3532 return CONST0_RTX (mode);
3536 val = FLOAT_STORE_FLAG_VALUE (mode);
3537 return CONST_DOUBLE_FROM_REAL_VALUE (val, mode);
3543 if (VECTOR_MODE_P (mode))
3546 return CONST0_RTX (mode);
3552 rtx val = VECTOR_STORE_FLAG_VALUE (mode);
3556 return CONST1_RTX (mode);
3558 units = GET_MODE_NUNITS (mode);
3562 return gen_rtx_raw_CONST_VECTOR (mode, v);
3579 return simplify_relational_operation (code, mode, VOIDmode,
3588 return simplify_relational_operation_1 (code, mode, cmp_mode,
3595 MODE is the mode of the result, while CMP_MODE specifies in which
3596 mode the comparison is done in, so it is the mode of the operands. */
3599 simplify_relational_operation_1 (enum rtx_code code, enum machine_mode mode,
3612 if (GET_MODE (op0) == mode)
3615 return simplify_gen_relational (GET_CODE (op0), mode, VOIDmode,
3622 return simplify_gen_relational (new_code, mode, VOIDmode,
3640 return simplify_gen_relational (code, mode, cmp_mode, x, c);
3647 && GET_MODE_CLASS (mode) == MODE_INT
3650 && mode != BImode
3654 return GET_MODE_SIZE (mode) > GET_MODE_SIZE (cmp_mode)
3655 ? simplify_gen_unary (ZERO_EXTEND, mode, op0, cmp_mode)
3656 : lowpart_subreg (mode, op0, cmp_mode);
3662 return simplify_gen_relational (code, mode, cmp_mode,
3670 return simplify_gen_relational (code, mode, cmp_mode,
3678 return simplify_gen_relational (code, mode, cmp_mode,
3688 return simplify_gen_relational (code, mode, cmp_mode, XEXP (op0, 0),
3702 enum machine_mode mode,
3710 gcc_assert (mode != VOIDmode
3721 mode = GET_MODE (op0);
3723 mode = GET_MODE (op1);
3753 if (INTEGRAL_MODE_P (mode) && trueop1 != const0_rtx
3757 && 0 != (tem = simplify_binary_operation (MINUS, mode, op0, op1))
3761 mode, tem, const0_rtx);
3763 if (! HONOR_NANS (mode) && code == ORDERED)
3766 if (! HONOR_NANS (mode) && code == UNORDERED)
3817 else if ((GET_MODE_CLASS (mode) == MODE_INT || mode == VOIDmode)
3823 int width = GET_MODE_BITSIZE (mode);
3877 if (SCALAR_INT_MODE_P (mode)
3878 && GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT)
3891 get_mode_bounds (mode, sign, mode, &mmin, &mmax);
3947 if (trueop1 == CONST0_RTX (mode)
3948 && !HONOR_SNANS (mode)
3949 && (!INTEGRAL_MODE_P (mode)
3956 if (INTEGRAL_MODE_P (mode)
3969 if (trueop1 == CONST0_RTX (mode)
3970 && !HONOR_NANS (mode)
3971 && (!INTEGRAL_MODE_P (mode)
3978 if (INTEGRAL_MODE_P (mode)
3991 if (trueop1 == CONST0_RTX (mode))
4047 /* Simplify CODE, an operation with result mode MODE and three operands,
4048 OP0, OP1, and OP2. OP0_MODE was the mode of OP0 before it became
4052 simplify_ternary_operation (enum rtx_code code, enum machine_mode mode,
4056 unsigned int width = GET_MODE_BITSIZE (mode);
4091 /* Clear the bits that don't belong in our mode,
4094 unsigned value for this mode. */
4100 return gen_int_mode (val, mode);
4115 && ! HONOR_NANS (mode)
4116 && ! HONOR_SIGNED_ZEROS (mode)
4126 && ! HONOR_NANS (mode)
4127 && ! HONOR_SIGNED_ZEROS (mode)
4160 return simplify_gen_relational (code, mode, cmp_mode,
4176 return gen_rtx_IF_THEN_ELSE (mode, temp, op1, op2);
4182 gcc_assert (GET_MODE (op0) == mode);
4183 gcc_assert (GET_MODE (op1) == mode);
4184 gcc_assert (VECTOR_MODE_P (mode));
4188 int elt_size = GET_MODE_SIZE (GET_MODE_INNER (mode));
4189 unsigned n_elts = (GET_MODE_SIZE (mode) / elt_size);
4209 return gen_rtx_CONST_VECTOR (mode, v);
4515 /* Changing mode twice with SUBREG => just change it once,
4516 or not at all if changing back op starting mode. */
4597 and/or mode. If the hard register is not valid in that mode,
4626 its mode. This is a kludge to work around how float/complex
4661 SUBREG with it. Don't do this if the MEM has a mode-dependent address
4707 can just extend to the appropriate mode. */
4731 the outer subreg is effectively a truncation to the original mode. */
4750 the outer subreg is effectively a truncation to the original mode. */
4765 the outer subreg is effectively a truncation to the original mode. */
4848 enum machine_mode mode = GET_MODE (x);
4853 return simplify_unary_operation (code, mode,
4857 return simplify_gen_binary (code, mode, XEXP (x, 1), XEXP (x, 0));
4862 return simplify_binary_operation (code, mode, XEXP (x, 0), XEXP (x, 1));
4866 return simplify_ternary_operation (code, mode, GET_MODE (XEXP (x, 0)),
4872 return simplify_relational_operation (code, mode,
4882 return simplify_gen_subreg (mode, SUBREG_REG (x),