contrib/gcc/see.c

29 Depending on the instruction set of the architecture, some of these
88 set ((reg:SI 10) (..def1rhs..))
89 set ((reg:DI 100) (sign_extend:DI (reg:SI 10)))
92 set ((reg:DI 100) (const_int 7))
95 set ((reg:SI 20) (..def3rhs..))
96 set ((reg:DI 100) (sign_extend:DI (reg:SI 20)))
99 set ((reg:CC...) (compare:CC (reg:DI 100) (...)))
102 set ((...) (reg:DI 100))
124 set ((reg:DI 100) (sign_extend:DI ((subreg:SI (reg:DI 100)))))
125 set ((reg:CC...) (compare:CC (reg:DI 100) (...)))
128 set ((reg:DI 100) (sign_extend:DI ((subreg:SI (reg:DI 100)))))
129 set ((...) (reg:DI 100))
154 set ((subreg:SI (reg:DI 100)) (..def1rhs..))
155 set ((reg:SI 10) (subreg:SI (reg:DI 100)))
160 set ((reg:DI 100) (const_int 7))
161 set ((reg:DI 100) (sign_extend:DI ((subreg:SI (reg:DI 100)))))
164 set ((reg:DI 100) (sign_extend:DI (..def3rhs..)))
165 set ((reg:SI 20) (reg:DI 100))
166 set ((reg:DI 100) (sign_extend:DI (reg:SI 20)))
170 set ((reg:CC...)
196 set ((reg:DI 100) (sign_extend:DI ((subreg:SI (reg:DI 100)))))
199 set ((reg:DI 100) (sign_extend:DI (reg:SI 20)))
222 [  set ((reg:SI 10) (..def1rhs..))		     ]	 - Deleted
223 [  set ((reg:DI 100) (sign_extend:DI (reg:SI 10)))   ]	 - Deleted
224 set ((subreg:SI (reg:DI 100)) (..def3rhs..))		 - Inserted
225 set ((reg:SI 10) (subreg:SI (reg:DI 100)))		 - Inserted
228 set ((reg:DI 100) (const_int 7))			 - No change
231 [  set ((reg:SI 20) (..def3rhs..))		     ]	 - Deleted
232 [  set ((reg:DI 100) (sign_extend:DI (reg:SI 20)))   ]	 - Deleted
233 set ((reg:DI 100) (sign_extend:DI (..def3rhs..)))	 - Inserted
234 set ((reg:SI 20) (reg:DI 100))				 - Inserted
237 [  set ((reg:CC...) (compare:CC (reg:DI 100) (...))) ]	 - Deleted
238 set ((reg:CC...)					 - Inserted
242 set ((...) (reg:DI 100))				 - No change
245 set ((reg:DI 100) (sign_extend:DI ((subreg:SI (reg:DI 100)))))
261    A simple explicit extension is a single set instruction that
287      and set their local relevancy and local source_mode like this:
295        EXTENDED_DEF and set its source_mode to be the narrowest
297   c. Traverse over all the instructions that contains a use and set
368 In this phase, we set the bit vectors input of the edge based LCM
423   Details: This is a disjoint-set data structure.  Most of its functions are
666     set (reg/subreg reg1) (sign/zero_extend:WIDEmode (reg/subreg reg2))
669     Otherwise, if RETURN_DEST_REG is set, return reg1 else return reg2.  */
674   rtx set, rhs, lhs;
682   set = single_set (extension);
683   if (!set)
685   lhs = SET_DEST (set);
686   rhs = SET_SRC (set);
713     set (reg/subreg reg1) (sign/zero_extend: (...expr...)
716     Otherwise, set SOURCE_MODE to be the mode of the extended expr and return
722   rtx rhs, lhs, set;
731   set = single_set (extension);
732   if (!set)
734   rhs = SET_SRC (set);
735   lhs = SET_DEST (set);
759    set ((reg r) (sign/zero_extend (subreg:mode (reg r))))
760    (the register r on both sides of the set is the same register).
804    set ((reg:WIDEmode r1) (sign_extend:WIDEmode
836   rtx set = single_set (extension->se_insn);
839   gcc_assert (set);
840   rhs = SET_SRC (set);
921    set ((reg:WIDEmode r1) (sign_extend:WIDEmode
924    set ((reg:WIDEmode r1) (sign_extend:WIDEmode (reg:NARROWmode r2)))
969   rtx set, lhs;
975   set = single_set (r);
976   gcc_assert (set);
977   lhs = SET_DEST (set);
2093    In this phase, we set the input bit vectors of the LCM according to data
2143 /* In this function we set the register properties for the register that is
2214 /* In this function we set the register properties for the register that is
2285 /* In this function we set the register properties for the register that is used
2418    ref:	    set (dest_reg) (rhs)
2419    def_se:  set (dest_extension_reg) (sign/zero_extend (source_extension_reg))
2424    set (subreg (dest_extension_reg)) (rhs)
2434    set (subreg (dest_extension_reg)) (dest_reg)
2455   rtx set, rhs;
2461   set = single_set (def_se);
2462   gcc_assert (set);
2463   rhs = SET_SRC (set);
2565    use_se: set (dest_extension_reg) (sign/zero_extend (source_extension_reg))
2703    ref:	   set (dest_reg) (rhs)
2704    def_se: set (dest_extension_reg) (sign/zero_extend (source_extension_reg))
2710    set (dest_extension_reg) (sign/zero_extend (rhs))
2711    If ref is a parallel instruction we just replace the relevant set in it.
3388    INSN:		set ((reg:WIDEmode r')
3390    return SIGN_EXTENDED_DEF and set SOURCE_MODE to NARROWmode.
3394    INSN:		set ((reg:WIDEmode r')
3396    return ZERO_EXTENDED_DEF and set SOURCE_MODE to NARROWmode.
3401    INSN:  set ((reg:WIDEmode r) (sign_extend:WIDEmode (...expr...)))
3402    return EXTENDED_DEF and set SOURCE_MODE to the mode of expr.
3405    INSN:  set ((reg:WIDEmode r) (zero_extend:WIDEmode (...expr...)))
3406    return EXTENDED_DEF and set SOURCE_MODE_UNSIGNED to the mode of expr.
3409    INSN:  set ((reg:WIDEmode r) (CONST_INT (...)))
3410    return EXTENDED_DEF and set SOURCE_MODE(_UNSIGNED) to the narrowest mode that
3424   rtx set = NULL;
3496       set = single_set (insn);
3497       if (!set)
3499       rhs = SET_SRC (set);
3500       lhs = SET_DEST (set);