Lines Matching refs:iv0

476 iv_add (struct rtx_iv *iv0, struct rtx_iv *iv1, enum rtx_code op)
482 if (iv0->extend == UNKNOWN
483 && iv0->mode == iv0->extend_mode
484 && iv0->step == const0_rtx
485 && GET_MODE_SIZE (iv0->extend_mode) < GET_MODE_SIZE (iv1->extend_mode))
487 iv0->extend_mode = iv1->extend_mode;
488 iv0->base = simplify_gen_unary (ZERO_EXTEND, iv0->extend_mode,
489 iv0->base, iv0->mode);
494 && GET_MODE_SIZE (iv1->extend_mode) < GET_MODE_SIZE (iv0->extend_mode))
496 iv1->extend_mode = iv0->extend_mode;
501 mode = iv0->extend_mode;
505 if (iv0->extend == UNKNOWN && iv1->extend == UNKNOWN)
507 if (iv0->mode != iv1->mode)
510 iv0->base = simplify_gen_binary (op, mode, iv0->base, iv1->base);
511 iv0->step = simplify_gen_binary (op, mode, iv0->step, iv1->step);
521 iv0->delta = simplify_gen_binary (op, mode, iv0->delta, iv1->base);
525 if (iv0->extend == UNKNOWN
526 && iv0->mode == mode
527 && iv0->step == const0_rtx)
529 arg = iv0->base;
530 *iv0 = *iv1;
532 && !iv_neg (iv0))
535 iv0->delta = simplify_gen_binary (PLUS, mode, iv0->delta, arg);
904 struct rtx_iv iv0, iv1;
974 && !iv_analyze_expr (insn, op0, omode, &iv0))
985 if (!iv_extend (&iv0, code, mode))
990 if (!iv_neg (&iv0))
996 if (!iv_add (&iv0, &iv1, code))
1001 if (!iv_mult (&iv0, mby))
1006 if (!iv_shift (&iv0, mby))
1014 *iv = iv0;
1874 canonicalize_iv_subregs (struct rtx_iv *iv0, struct rtx_iv *iv1,
1882 if (iv0->first_special || iv0->mult != const1_rtx || iv0->delta != const0_rtx)
1892 if (iv0->extend == ZERO_EXTEND
1900 if (iv0->extend == SIGN_EXTEND
1907 if (iv0->extend != UNKNOWN
1909 && iv0->extend != iv1->extend)
1913 if (iv0->extend != UNKNOWN)
1914 signed_p = iv0->extend == SIGN_EXTEND;
1926 (compare (subreg:SI (iv0)) (subreg:SI (iv1)))
1928 and iv0 and iv1 are both ivs iterating in SI mode, but calculated
1936 comp_mode = iv0->extend_mode;
1940 if (iv0->extend_mode != comp_mode)
1942 if (iv0->mode != iv0->extend_mode
1943 || iv0->step != const0_rtx)
1946 iv0->base = simplify_gen_unary (signed_p ? SIGN_EXTEND : ZERO_EXTEND,
1947 comp_mode, iv0->base, iv0->mode);
1948 iv0->extend_mode = comp_mode;
1965 if (iv0->mode == iv0->extend_mode
1966 && iv0->step == const0_rtx
1967 && iv0->mode != iv1->mode)
1968 shorten_into_mode (iv0, iv1->mode, cond, signed_p, desc);
1972 && iv0->mode != iv1->mode)
1973 shorten_into_mode (iv1, iv0->mode, swap_condition (cond), signed_p, desc);
1975 if (iv0->mode != iv1->mode)
1978 desc->mode = iv0->mode;
1993 struct rtx_iv iv0, iv1, tmp_iv;
2034 if (!iv_analyze (insn, op0, &iv0))
2036 if (iv0.extend_mode == VOIDmode)
2037 iv0.mode = iv0.extend_mode = mode;
2045 if (GET_MODE_BITSIZE (iv0.extend_mode) > HOST_BITS_PER_WIDE_INT
2057 tmp_iv = iv0; iv0 = iv1; iv1 = tmp_iv;
2075 if (!canonicalize_iv_subregs (&iv0, &iv1, cond, desc))
2078 comp_mode = iv0.extend_mode;
2079 mode = iv0.mode;
2085 if (GET_CODE (iv0.step) != CONST_INT || GET_CODE (iv1.step) != CONST_INT)
2091 if (iv0.step != const0_rtx && iv1.step != const0_rtx)
2096 iv0.step = simplify_gen_binary (MINUS, comp_mode, iv0.step, iv1.step);
2102 if (iv0.step == const0_rtx && iv1.step == const0_rtx)
2107 if (iv0.step == const0_rtx)
2110 step_val = INTVAL (iv0.step);
2138 if (iv0.step == const0_rtx)
2140 tmp = lowpart_subreg (mode, iv0.base, comp_mode);
2145 iv0.base = simplify_gen_binary (PLUS, comp_mode,
2146 iv0.base, const1_rtx);
2174 if (iv0.step == const0_rtx)
2176 tmp = lowpart_subreg (mode, iv0.base, comp_mode);
2206 if (iv0.step == const0_rtx)
2209 step = iv0.step;
2210 delta = simplify_gen_binary (MINUS, comp_mode, iv1.base, iv0.base);
2231 else if (iv0.step == const0_rtx)
2236 tmp = lowpart_subreg (mode, iv0.base, comp_mode);
2278 inc = INTVAL (iv0.step) - INTVAL (iv1.step);
2283 down = INTVAL (GET_CODE (iv0.base) == CONST_INT
2284 ? iv0.base
2288 if (iv0.step == const0_rtx)
2290 iv0.base = simplify_gen_binary (PLUS, comp_mode, iv0.base, delta);
2291 iv0.base = simplify_gen_binary (MINUS, comp_mode, iv0.base, step);
2299 tmp0 = lowpart_subreg (mode, iv0.base, comp_mode);
2319 iv1.base = simplify_gen_binary (MINUS, comp_mode, iv1.base, iv0.base);
2320 iv0.base = const0_rtx;
2321 iv0.step = simplify_gen_binary (MINUS, comp_mode, iv0.step, iv1.step);
2323 if (INTVAL (iv0.step) < 0)
2325 iv0.step = simplify_gen_unary (NEG, comp_mode, iv0.step, mode);
2328 iv0.step = lowpart_subreg (mode, iv0.step, comp_mode);
2333 s = INTVAL (iv0.step); d = 1;
2362 step = iv0.step;
2363 tmp0 = lowpart_subreg (mode, iv0.base, comp_mode);
2394 tmp = simplify_gen_binary (PLUS, comp_mode, iv1.base, iv0.step);
2408 tmp0 = lowpart_subreg (mode, iv0.base, comp_mode);
2438 tmp = simplify_gen_binary (PLUS, comp_mode, iv0.base, iv1.step);