Lines Matching refs:offset
87 int gp_save_offset; /* offset to save GP regs from initial SP */
88 int fp_save_offset; /* offset to save FP regs from initial SP */
89 int altivec_save_offset; /* offset to save AltiVec regs from initial SP */
90 int lr_save_offset; /* offset to save LR from initial SP */
91 int cr_save_offset; /* offset to save CR from initial SP */
92 int vrsave_save_offset; /* offset to save VRSAVE from initial SP */
93 int spe_gp_save_offset; /* offset to save spe 64-bit gprs */
94 int varargs_save_offset; /* offset to save the varargs registers */
95 int ehrd_offset; /* offset to EH return data */
2530 /* Add offset to field within buffer matching vector element. */
2802 /* SPE offset addressing is limited to 5-bits worth of double words. */
2808 unsigned HOST_WIDE_INT offset, extra;
2821 offset = INTVAL (XEXP (x, 1));
2830 constant offset zero should not occur due to canonicalization.
2831 Allow any offset when not strict before reload. */
2839 return SPE_CONST_OFFSET_OK (offset);
2843 return SPE_CONST_OFFSET_OK (offset);
2852 return SPE_CONST_OFFSET_OK (offset);
2856 else if (offset & 3)
2864 else if (offset & 3)
2874 offset += 0x8000;
2875 return (offset < 0x10000) && (offset + extra < 0x10000);
3318 /* IE, or 64 bit offset LE. */
3417 /* Force ld/std non-word aligned offset into base register by wrapping
3418 in offset 0. */
3495 rtx offset = gen_rtx_CONST (Pmode,
3500 gen_rtx_HIGH (Pmode, offset)), offset);
3514 /* Reload an offset address wrapped by an AND that represents the
3516 convert the offset address into an indirect address. */
3553 we must ensure that both words are addressable or PowerPC64 with offset
3588 /* If not REG_OK_STRICT (before reload) let pass any stack offset. */
3619 this assuming that the adjustable offset must be valid for the
4679 /* ??? FIXME: else assume zero offset. */
4749 the parameter save area starts at offset 24 from the
5050 /* ??? FIXME: else assume zero offset. */
5088 being passed by value, along with the offset of where the
5300 save area starts at offset 24 from the stack. In 64-bit mode,
5663 HOST_WIDE_INT offset = 0;
5688 offset = -((first_reg_offset * reg_size) & ~7);
5698 offset = - (int) (next_cum.fregno - FP_ARG_MIN_REG)
5713 offset += INTVAL (XEXP (reg_save_area, 1));
5719 cfun->machine->varargs_save_offset = offset;
5720 save_area = plus_constant (virtual_stack_vars_rtx, offset);
9364 int offset;
9397 for (offset = 0; bytes > 0; offset += clear_bytes, bytes -= clear_bytes)
9431 dest = adjust_address (orig_dest, mode, offset);
9461 int offset;
9484 for (offset = 0; bytes > 0; offset += move_bytes, bytes -= move_bytes)
9575 src = adjust_address (orig_src, mode, offset);
9576 dest = adjust_address (orig_dest, mode, offset);
9597 patterns require zero offset. */
9965 /* Extract an offset (if used) from the first addr. */
9974 /* The offset must be constant! */
9998 /* The offset must be constant. */
10017 /* The offset for the second addr must be 8 more than the first addr. */
10541 we have already done it, we can just use an offset of word. */
14131 rtx synth, offset, reg, real2;
14163 offset = XEXP (XEXP (SET_DEST (real2), 0), 1);
14164 real2 = replace_rtx (real2, offset, GEN_INT (INTVAL (offset) + 4));
14172 offset = XEXP (XEXP (SET_DEST (synth), 0), 1);
14173 synth = replace_rtx (synth, offset,
14174 GEN_INT (INTVAL (offset)
14251 unsigned int regno, int offset, HOST_WIDE_INT total_size)
14256 int_rtx = GEN_INT (offset);
14263 && !SPE_CONST_OFFSET_OK (offset)))
14289 /* Emit an offset memory reference suitable for a frame store, while
14293 gen_frame_mem_offset (enum machine_mode mode, rtx reg, int offset)
14297 int_rtx = GEN_INT (offset);
14627 int offset = info->spe_gp_save_offset + sp_offset + 8 * i;
14630 if (!SPE_CONST_OFFSET_OK (offset))
14633 emit_move_insn (b, GEN_INT (offset));
14636 b = GEN_INT (offset);
14647 b, GEN_INT (offset));
14782 int offset;
14784 offset = info->altivec_save_offset + sp_offset
14790 emit_move_insn (areg, GEN_INT (offset));
14799 areg, GEN_INT (offset));
14814 int offset;
14829 offset = info->vrsave_save_offset + sp_offset;
14832 GEN_INT (offset)));
15266 int offset = info->spe_gp_save_offset + sp_offset + 8 * i;
15269 if (!SPE_CONST_OFFSET_OK (offset))
15272 emit_move_insn (b, GEN_INT (offset));
15275 b = GEN_INT (offset);
15489 includes the offset from the start of the function to the
15518 its offset from the function start. */
15566 apparently a PL/I convention?), out-of-line epilogue/prologue, offset
15768 /* Apply the constant offset, if required. */
15777 /* Apply the offset from the vtable, if required. */
16014 HOST_WIDE_INT offset = 0;
16264 offset = INTVAL (XEXP (XEXP (x, 0), 1));
16293 if (offset < 0)
16294 fprintf (file, ".N" HOST_WIDE_INT_PRINT_UNSIGNED, - offset);
16295 else if (offset)
16296 fprintf (file, ".P" HOST_WIDE_INT_PRINT_UNSIGNED, offset);
16310 if (offset < 0)
16311 fprintf (file, HOST_WIDE_INT_PRINT_DEC, offset);
16312 else if (offset > 0)
16313 fprintf (file, "+" HOST_WIDE_INT_PRINT_DEC, offset);
17539 #define MEM_PLUS(addr,offset) \
17540 gen_rtx_MEM (Pmode, memory_address (Pmode, plus_constant (addr, offset)))
18282 rtx base, offset;
18302 offset =
18306 if (GET_CODE (offset) == CONST_INT)
18308 if (SMALL_INT (offset))
18309 return plus_constant (base, INTVAL (offset));
18311 offset = force_reg (Pmode, offset);
18318 return gen_rtx_PLUS (Pmode, base, offset);
19484 /* Define the offset between two registers, FROM to be eliminated and its
19490 HOST_WIDE_INT offset;
19493 offset = info->push_p ? 0 : -info->total_size;
19496 offset = info->push_p ? 0 : -info->total_size;
19498 offset += info->fixed_size + info->vars_size + info->parm_size;
19501 offset = FRAME_GROWS_DOWNWARD
19505 offset = info->total_size;
19507 offset = info->push_p ? info->total_size : 0;
19509 offset = 0;
19513 return offset;