config/rs6000/rs6000.c

278   const int muldi;	  /* cost of DImode multiplication.  */
280   const int divdi;	  /* cost of DImode division.  */
1069   /* The float registers can only hold floating modes and DImode.
2125 	if (mode == VOIDmode || mode == DImode)
2631 	  && GET_MODE (SUBREG_REG (op)) == DImode)
2845     case DImode:
2939   if (TARGET_E500_DOUBLE && (mode == DFmode || mode == DImode))
3016 	       || (((mode != DImode && mode != DFmode) || TARGET_E500_DOUBLE)
3018 	   && (TARGET_POWERPC64 || mode != DImode)
3038 				      || mode == DImode)))
3040       if (mode == DImode)
3085 	   && mode != DImode
3444 				  || mode == DImode))
3485 	 The same goes for DImode without 64-bit gprs and DFmode
3488       && (mode != DImode || TARGET_POWERPC64)
3552    auto-increment.  For DFmode and DImode with a constant plus register,
3557    32-bit DImode, TImode, TFmode), indexed addressing cannot be used because
3580       && !(TARGET_E500_DOUBLE && (mode == DFmode || mode == DImode))
3603       && (TARGET_POWERPC64 || mode != DImode)
3820     case DImode:
3869 					DImode);
3871 					DImode);
3905 	    emit_move_insn (dest, gen_rtx_IOR (DImode, dest, GEN_INT (ud1)));
3917 	    emit_move_insn (dest, gen_rtx_IOR (DImode, dest, GEN_INT (ud2)));
3918 	  emit_move_insn (dest, gen_rtx_ASHIFT (DImode, dest, GEN_INT (16)));
3920 	    emit_move_insn (dest, gen_rtx_IOR (DImode, dest, GEN_INT (ud1)));
3931 	    emit_move_insn (dest, gen_rtx_IOR (DImode, dest, GEN_INT (ud3)));
3933 	  emit_move_insn (dest, gen_rtx_ASHIFT (DImode, dest, GEN_INT (32)));
3935 	    emit_move_insn (dest, gen_rtx_IOR (DImode, dest,
3938 	    emit_move_insn (dest, gen_rtx_IOR (DImode, dest, GEN_INT (ud1)));
3996       && mode == DImode
3997       && (SLOW_UNALIGNED_ACCESS (DImode, MEM_ALIGN (operands[0]))
3998 	  || SLOW_UNALIGNED_ACCESS (DImode, MEM_ALIGN (operands[1])))
4081       /* DImode is used, not DFmode, because simplify_gen_subreg doesn't
4083       rs6000_emit_move (simplify_gen_subreg (DImode, operands[0], mode, 0),
4084 			simplify_gen_subreg (DImode, operands[1], mode, 0),
4085 			DImode);
4086       rs6000_emit_move (simplify_gen_subreg (DImode, operands[0], mode,
4087 					     GET_MODE_SIZE (DImode)),
4088 			simplify_gen_subreg (DImode, operands[1], mode,
4089 					     GET_MODE_SIZE (DImode)),
4090 			DImode);
4131     case DImode:
4888       r1 = gen_rtx_REG (DImode, gregno);
4893       r1 = gen_rtx_REG (DImode, gregno);
4895       r3 = gen_rtx_REG (DImode, gregno + 2);
5323 	    part_mode = DImode;
5414 		      enum machine_mode rmode = TARGET_32BIT ? SImode : DImode;
5602   enum machine_mode reg_mode = TARGET_32BIT ? SImode : DImode;
9413 	  mode = DImode;
9543 	  mode = DImode;
9782 	   && (GET_MODE (andop) == VOIDmode || GET_MODE (andop) == DImode))
9866 	   && (GET_MODE (andop) == VOIDmode || GET_MODE (andop) == DImode))
10534       /* Write second word of DImode or DFmode reference.  Works on register
10676       if (! mask64_operand (x, DImode))
11495   if (TARGET_POWERPC64 && (op_mode == DImode || rs6000_compare_fp_p))
11497       PUT_MODE (condition_rtx, DImode);
12426   else if (mode == DImode)
12440   else if (mode == DImode)
18814 		  || (mode == DImode
18815 		      && mask64_operand (x, DImode))))
18865       if (mode == DImode && code == CONST_DOUBLE)
18875 	  else if ((outer_code == AND && and64_2_operand (x, DImode))
18971       else if (mode == DImode)
19001 	  if (GET_MODE (XEXP (x, 1)) == DImode)
19039 	  if (mode == DImode)
19385   if (TARGET_32BIT && TARGET_POWERPC64 && TYPE_MODE (valtype) == DImode)
19388       return gen_rtx_PARALLEL (DImode,
19422     mode = TARGET_32BIT ? SImode : DImode;
19451   if (TARGET_32BIT && TARGET_POWERPC64 && mode == DImode)
19454       return gen_rtx_PARALLEL (DImode,