config/arm/ieee754-df.S

50 #define yh r3
55 #define yl r3
219 	movne	r3, #20
220 	moveq	r3, #52
226 	subhs	r3, r3, #16
229 	subhs	r3, r3, #8
232 	subhs	r3, r3, #4
234 	subhs	r3, r3, #2
235 	sublo	r3, r3, r2, lsr #1
236 	sub	r3, r3, r2, lsr #3
243 	clz	r3, xh
244 	addeq	r3, r3, #32
245 	sub	r3, r3, #11
250 	subs	r2, r3, #32
272 3:	subs	r4, r4, r3
430 	andnes	r3, r2, #0xff000000	@ isolate exponent
431 	teqne	r3, #0xff000000		@ if not 0, check if INF or NAN
436 	teqne	r3, #0xff000000		@ or INF or NAN
516 	rsb	r3, r2, #32
517 	mov	ip, xl, lsl r3
519 	orr	xl, xl, xh, lsl r3
715 	mov	r3, xl, lsl r5
720 	adds	xl, xl, r3, lsr #31
722 	orrs	lr, lr, r3, lsl #1
723 	biceq	xl, xl, r3, lsr #31
730 	mov	r3, xl, lsl r4
734 	adds	xl, xl, r3, lsr #31
736 	orrs	lr, lr, r3, lsl #1
737 	biceq	xl, xl, r3, lsr #31
741 	@ from xh to xl.  Leftover bits are in r3-r6-lr for rounding.
744 	mov	r3, xl, lsr r4
745 	orr	r3, r3, xh, lsl r5
749 	add	xl, xl, r3, lsr #31
750 	orrs	lr, lr, r3, lsl #1
751 	biceq	xl, xl, r3, lsr #31
1094 	mov	r1, r3
1095 	mov	r3, ip
1205 	mov	r3, #(0xfffffc00 + 31)
1206 	subs	r2, r3, r2, asr #21
1210 	mov	r3, xh, lsl #11
1211 	orr	r3, r3, #0x80000000
1212 	orr	r3, r3, xl, lsr #21
1214 	mov	r0, r3, lsr r2
1246 	mov	r3, #(0xfffffc00 + 31)
1247 	subs	r2, r3, r2, asr #21
1251 	mov	r3, xh, lsl #11
1252 	orr	r3, r3, #0x80000000
1253 	orr	r3, r3, xl, lsr #21
1254 	mov	r0, r3, lsr r2
1280 	subs	r3, r2, #((1023 - 127) << 21)
1281 	subcss	ip, r3, #(1 << 21)
1290 	adc	r0, xl, r3, lsl #2
1299 	adds	r2, r3, #(23 << 21)
1308 	movs	r3, xl, lsl ip
1310 	orrne	xl, xl, #1		@ fold r3 for rounding considerations.
1311 	mov	r3, xh, lsl #11
1312 	mov	r3, r3, lsr #11
1313 	orr	xl, xl, r3, lsl ip
1314 	mov	r3, r3, lsr r2
1315 	mov	r3, r3, lsl #1
1319 	mvns	r3, r2, asr #21
1321 	orrs	r3, xl, xh, lsl #12