net/mlx4/port.c

107 static int mlx4_set_port_mac_table(struct mlx4_dev *dev, u8 port,
120 	in_mod = MLX4_SET_PORT_MAC_TABLE << 8 | port;
129 int __mlx4_register_mac(struct mlx4_dev *dev, u8 port, u64 mac)
131 	struct mlx4_port_info *info = &mlx4_priv(dev)->port[port];
136 	mlx4_dbg(dev, "Registering MAC: 0x%llx for port %d\n",
137 		 (unsigned long long) mac, port);
166 	err = mlx4_set_port_mac_table(dev, port, table->entries);
183 int mlx4_register_mac(struct mlx4_dev *dev, u8 port, u64 mac)
191 					   ((u32) port) << 8 | (u32) RES_MAC,
197 			set_param_l(&out_param, port);
209 	return __mlx4_register_mac(dev, port, mac);
213 int mlx4_get_base_qpn(struct mlx4_dev *dev, u8 port)
216 			(port - 1) * (1 << dev->caps.log_num_macs);
220 void __mlx4_unregister_mac(struct mlx4_dev *dev, u8 port, u64 mac)
226 	if (port < 1 || port > dev->caps.num_ports) {
227 		mlx4_warn(dev, "invalid port number (%d), aborting...\n", port);
230 	info = &mlx4_priv(dev)->port[port];
246 	mlx4_set_port_mac_table(dev, port, table->entries);
253 void mlx4_unregister_mac(struct mlx4_dev *dev, u8 port, u64 mac)
260 					    ((u32) port) << 8 | (u32) RES_MAC,
265 			set_param_l(&out_param, port);
272 	__mlx4_unregister_mac(dev, port, mac);
277 int __mlx4_replace_mac(struct mlx4_dev *dev, u8 port, int qpn, u64 new_mac)
279 	struct mlx4_port_info *info = &mlx4_priv(dev)->port[port];
293 	err = mlx4_set_port_mac_table(dev, port, table->entries);
305 static int mlx4_set_port_vlan_table(struct mlx4_dev *dev, u8 port,
317 	in_mod = MLX4_SET_PORT_VLAN_TABLE << 8 | port;
326 int mlx4_find_cached_vlan(struct mlx4_dev *dev, u8 port, u16 vid, int *idx)
328 	struct mlx4_vlan_table *table = &mlx4_priv(dev)->port[port].vlan_table;
345 int __mlx4_register_vlan(struct mlx4_dev *dev, u8 port, u16 vlan,
348 	struct mlx4_vlan_table *table = &mlx4_priv(dev)->port[port].vlan_table;
385 	err = mlx4_set_port_vlan_table(dev, port, table->entries);
400 int mlx4_register_vlan(struct mlx4_dev *dev, u8 port, u16 vlan, int *index)
410 				   ((u32) port) << 8 | (u32) RES_VLAN,
418 	return __mlx4_register_vlan(dev, port, vlan, index);
422 void __mlx4_unregister_vlan(struct mlx4_dev *dev, u8 port, u16 vlan)
424 	struct mlx4_vlan_table *table = &mlx4_priv(dev)->port[port].vlan_table;
428 	if (mlx4_find_cached_vlan(dev, port, vlan, &index)) {
445 	mlx4_set_port_vlan_table(dev, port, table->entries);
451 void mlx4_unregister_vlan(struct mlx4_dev *dev, u8 port, u16 vlan)
457 				    ((u32) port) << 8 | (u32) RES_VLAN,
463 	__mlx4_unregister_vlan(dev, port, vlan);
467 int mlx4_get_port_ib_caps(struct mlx4_dev *dev, u8 port, __be32 *caps)
492 	*(__be32 *) (&inbuf[20]) = cpu_to_be32(port);
494 	err = mlx4_cmd_box(dev, inmailbox->dma, outmailbox->dma, port, 3,
541 	int port;
555 	port = in_mod & 0xff;
558 	port_info = &priv->port[port];
569 				  "port %d, config_select 0x%x\n",
570 				  slave, port, in_modifier);
593 			 * the functions on the port. */
595 			mtu = min_t(int, mtu, dev->caps.eth_mtu_cap[port] +
597 			prev_mtu = slave_st->mtu[port];
598 			slave_st->mtu[port] = mtu;
599 			if (mtu > master->max_mtu[port])
600 				master->max_mtu[port] = mtu;
602 						master->max_mtu[port]) {
603 				slave_st->mtu[port] = mtu;
604 				master->max_mtu[port] = mtu;
606 					master->max_mtu[port] =
607 					max(master->max_mtu[port],
608 					    master->slave_state[i].mtu[port]);
612 			gen_context->mtu = cpu_to_be16(master->max_mtu[port]);
640 			 *    entries in the port GID table
645 				gid_entry_tbl = &priv->roce_gids[port - 1][i];
667 				memcpy(priv->roce_gids[port - 1][offset].raw, gid_entry_mbox->raw, 16);
669 			/* Now, copy roce port gids table to current mailbox for passing to FW */
672 				memcpy(gid_entry_mbox->raw, priv->roce_gids[port - 1][i].raw, 16);
695 	/* slave may not set the IS_SM capability for the port */
707 		priv->mfunc.master.slave_state[slave].ib_cap_mask[port];
708 	priv->mfunc.master.slave_state[slave].ib_cap_mask[port] = new_cap_mask;
711 			priv->mfunc.master.slave_state[i].ib_cap_mask[port];
726 	err = mlx4_cmd(dev, inbox->dma, port, is_eth, MLX4_CMD_SET_PORT,
729 		priv->mfunc.master.slave_state[slave].ib_cap_mask[port] =
744 /* bit locations for set port command with zero op modifier */
753 int mlx4_SET_PORT(struct mlx4_dev *dev, u8 port, int pkey_tbl_sz)
759 	if (dev->caps.port_type[port] == MLX4_PORT_TYPE_NONE)
768 	if (dev->caps.port_type[port] == MLX4_PORT_TYPE_ETH) {
769 		in_mod = MLX4_SET_PORT_GENERAL << 8 | port;
774 		((__be32 *) mailbox->buf)[1] = dev->caps.ib_port_def_cap[port];
782 		for (vl_cap = dev->caps.vl_cap[port];
788 				(dev->caps.port_ib_mtu[port] << MLX4_SET_PORT_MTU_CAP) |
790 			err = mlx4_cmd(dev, mailbox->dma, port, 0, MLX4_CMD_SET_PORT,
801 int mlx4_SET_PORT_general(struct mlx4_dev *dev, u8 port, int mtu,
822 	in_mod = MLX4_SET_PORT_GENERAL << 8 | port;
831 int mlx4_SET_PORT_qpn_calc(struct mlx4_dev *dev, u8 port, u32 base_qpn,
861 	in_mod = MLX4_SET_PORT_RQP_CALC << 8 | port;
870 int mlx4_SET_PORT_PRIO2TC(struct mlx4_dev *dev, u8 port, u8 *prio2tc)
887 	in_mod = MLX4_SET_PORT_PRIO2TC << 8 | port;
896 int mlx4_SET_PORT_SCHEDULER(struct mlx4_dev *dev, u8 port, u8 *tc_tx_bw,
934 	in_mod = MLX4_SET_PORT_SCHEDULER << 8 | port;
954 int mlx4_SET_MCAST_FLTR(struct mlx4_dev *dev, u8 port,
957 	return mlx4_cmd(dev, (mac | (clear << 63)), port, mode,
1015 int mlx4_get_slave_from_roce_gid(struct mlx4_dev *dev, int port, u8 *gid, int *slave_id)
1025 		if (!memcmp(priv->roce_gids[port - 1][i].raw, gid, 16)) {
1049 int mlx4_get_roce_gid_from_slave(struct mlx4_dev *dev, int port, int slave_id, u8 *gid)
1056 	memcpy(gid, priv->roce_gids[port - 1][slave_id].raw, 16);
1100 		return "invalid port selected";
1102 		return "operation not supported for this port (the port is of type CX4 or internal)";
1125  * @port: port number.
1135 int mlx4_get_module_info(struct mlx4_dev *dev, u8 port, u16 offset,
1190 	ret = mlx4_cmd_box(dev, inbox->dma, outbox->dma, port, 3,
1200 		    "port(%d) i2c_addr(%x) offset(%d) size(%d): Response "
1201 		    "Mad Status(%x) - %s\n", 0xFF60, port, i2c_addr, offset,