dev/wl/if_wl.c

422     outsw(PIOP1(base), str, strlen(str)/2+1);	/* write string */
425     insw(PIOP1(base), inbuf, strlen(str)/2+1);	/* read result */
544     outw(PIOP1(base), 0);			/* clear scb_crcerrs */
545     outw(PIOP1(base), 0);			/* clear scb_alnerrs */
546     outw(PIOP1(base), 0);			/* clear scb_rscerrs */
547     outw(PIOP1(base), 0);			/* clear scb_ovrnerrs */
666 	printf("%04x ", inw(PIOP1(base)));
672 	printf("%04x ", inw(PIOP1(base)));
678 	printf("%04x ", inw(PIOP1(base)));
896     outsw(PIOP1(base), &scp, sizeof(scp_t)/2);
904     outsw(PIOP1(base), &iscp, sizeof(iscp_t)/2);
915     outsw(PIOP1(base), &scb, sizeof(scb_t)/2);
937     outsw(PIOP1(base), &cb, 6/2);
944     outsw(PIOP1(base), &tbd, sizeof(tbd_t)/2);
971     cu_status = inw(PIOP1(base));
1080     insw(PIOP1(base), &fd, sizeof(fd_t)/2);
1091     insw(PIOP1(base), &rbd, sizeof(rbd_t)/2);
1130 	insw(PIOP1(base), mb_p, len/2);
1153 	    insw(PIOP1(base), &rbd, sizeof(rbd_t)/2);
1574 	    ac_status = inw(PIOP1(base));
1660 	link_offset = inw(PIOP1(base));
1661 	offset = inw(PIOP1(base));	/* rbd_offset */
1741     outsw(PIOP1(base), &fd, 8/2);
1744     outw(PIOP1(base), 0);		/* command = 0 */
1745     outw(PIOP1(base), fd_p);		/* end_fd->link_offset = fd_p */
1790     outsw(PIOP1(base), &cb, 6/2);
1791     outw(PIOP1(base), OFFSET_TBD);	/* cb.cmd.transmit.tbd_offset */
1792     outsw(PIOP1(base), eh_p->ether_dhost, WAVELAN_ADDR_SIZE/2);
1793     outw(PIOP1(base), eh_p->ether_type);
1806     outw(PIOP1(base), xmtdata_p);	/* buffer_addr */
1807     outw(PIOP1(base), 0);		/* buffer_base */
1817 	    outsw(PIOP1(base), mb_p, len/2);
1832 		outw(PIOP1(base), xmtdata_p); /* buffer_addr */
1833 		outw(PIOP1(base), 0);	      /* buffer_base */
1869 	    outw(PIOP1(base), 0);
1936 	outsw(PIOP1(base), &fd, 8/2);
1942     outw(PIOP1(base), AC_CW_EL);	/* command */
1943     outw(PIOP1(base), I82586NULL);	/* link_offset */
1962 	outsw(PIOP1(base), &rbd, sizeof(rbd_t)/2);
2029     outw(PIOP1(base), 0);			/* ac_status */
2030     outw(PIOP1(base), AC_DIAGNOSE|AC_CW_EL);/* ac_command */
2073     outw(PIOP1(base), 0);				/* ac_status */
2074     outw(PIOP1(base), AC_CONFIGURE|AC_CW_EL);	/* ac_command */
2108     outsw(PIOP1(base), &configure, sizeof(configure_t)/2);
2114     outw(PIOP1(base), 0);				/* ac_status */
2115     outw(PIOP1(base), AC_MCSETUP|AC_CW_EL);		/* ac_command */
2123         outw(PIOP1(base), addrp[0] + (addrp[1] << 8));
2124         outw(PIOP1(base), addrp[2] + (addrp[3] << 8));
2125         outw(PIOP1(base), addrp[4] + (addrp[5] << 8));
2130     outw(PIOP1(base), cnt * WAVELAN_ADDR_SIZE);
2136     outw(PIOP1(base), 0);				/* ac_status */
2137     outw(PIOP1(base), AC_IASETUP|AC_CW_EL);		/* ac_command */
2139     outsw(PIOP1(base), IF_LLADDR(sc->ifp), WAVELAN_ADDR_SIZE/2);
2210     if (!(cmd = (inw(PIOP1(base)) & SCB_SW_INT)))
2216     outw(PIOP1(base), cmd);
2238 	insw(PIOP1(base), &tbd, sizeof(tbd_t)/2);