Lines Matching defs:vpath

189 	/* Allocate memory for vpath */
195 device_printf(vdev->ndev, "vpath memory allocation failed\n");
360 /* Enabling mcast for all vpath */
363 /* Enabling bcast for all vpath */
367 "can't enable bcast on vpath (%d)\n", i);
606 vxge_vpath_t *vpath;
609 vpath = &(vdev->vpaths[0]);
612 if (VXGE_TX_TRYLOCK(vpath)) {
613 vxge_send_locked(ifp, vpath);
614 VXGE_TX_UNLOCK(vpath);
620 vxge_send_locked(ifnet_t ifp, vxge_vpath_t *vpath)
623 vxge_dev_t *vdev = vpath->vdev;
625 VXGE_TX_LOCK_ASSERT(vpath);
637 if (vxge_xmit(ifp, vpath, &m_head)) {
643 VXGE_DRV_STATS(vpath, tx_again);
658 vxge_vpath_t *vpath;
667 vpath = &(vdev->vpaths[i]);
668 if (VXGE_TX_TRYLOCK(vpath)) {
669 err = vxge_mq_send_locked(ifp, vpath, m_head);
670 VXGE_TX_UNLOCK(vpath);
672 err = drbr_enqueue(ifp, vpath->br, m_head);
678 vxge_mq_send_locked(ifnet_t ifp, vxge_vpath_t *vpath, mbuf_t m_head)
682 vxge_dev_t *vdev = vpath->vdev;
684 VXGE_TX_LOCK_ASSERT(vpath);
689 err = drbr_enqueue(ifp, vpath->br, m_head);
693 next = drbr_dequeue(ifp, vpath->br);
694 } else if (drbr_needs_enqueue(ifp, vpath->br)) {
695 if ((err = drbr_enqueue(ifp, vpath->br, m_head)) != 0)
697 next = drbr_dequeue(ifp, vpath->br);
703 if ((err = vxge_xmit(ifp, vpath, &next)) != 0) {
708 err = drbr_enqueue(ifp, vpath->br, next);
709 VXGE_DRV_STATS(vpath, tx_again);
721 next = drbr_dequeue(ifp, vpath->br);
733 vxge_vpath_t *vpath;
738 vpath = &(vdev->vpaths[i]);
739 if (!vpath->handle)
742 VXGE_TX_LOCK(vpath);
743 while ((m_head = buf_ring_dequeue_sc(vpath->br)) != NULL)
746 VXGE_TX_UNLOCK(vpath);
753 vxge_xmit(ifnet_t ifp, vxge_vpath_t *vpath, mbuf_t *m_headp)
765 vxge_dev_t *vdev = vpath->vdev;
767 VXGE_DRV_STATS(vpath, tx_xmit);
769 txdl_avail = vxge_hal_fifo_free_txdl_count_get(vpath->handle);
772 VXGE_DRV_STATS(vpath, tx_low_dtr_cnt);
778 status = vxge_hal_fifo_txdl_reserve(vpath->handle, &txdlh, &dtr_priv);
780 VXGE_DRV_STATS(vpath, tx_reserve_failed);
792 err = vxge_dma_mbuf_coalesce(vpath->dma_tag_tx, txdl_priv->dma_map,
795 if (vpath->driver_stats.tx_max_frags < num_segs)
796 vpath->driver_stats.tx_max_frags = num_segs;
799 VXGE_DRV_STATS(vpath, tx_no_dma_setup);
800 vxge_hal_fifo_txdl_free(vpath->handle, txdlh);
804 VXGE_DRV_STATS(vpath, tx_no_dma_setup);
805 vxge_hal_fifo_txdl_free(vpath->handle, txdlh);
822 vxge_hal_fifo_txdl_buffer_set(vpath->handle, txdlh, dma_index,
827 bus_dmamap_sync(vpath->dma_tag_tx, txdl_priv->dma_map,
832 VXGE_DRV_STATS(vpath, tx_tso);
851 vxge_hal_fifo_txdl_post(vpath->handle, txdlh, tagged);
852 VXGE_DRV_STATS(vpath, tx_posted);
869 vxge_vpath_t *vpath = (vxge_vpath_t *) userdata;
872 err = bus_dmamap_create(vpath->dma_tag_tx, BUS_DMA_NOWAIT,
889 vxge_vpath_t *vpath = (vxge_vpath_t *) userdata;
890 vxge_dev_t *vdev = vpath->vdev;
894 VXGE_TX_LOCK(vpath);
902 VXGE_DRV_STATS(vpath, tx_compl);
908 VXGE_DRV_STATS(vpath, tx_tcode);
914 bus_dmamap_unload(vpath->dma_tag_tx, txdl_priv->dma_map);
917 vxge_hal_fifo_txdl_free(vpath->handle, txdlh);
924 VXGE_TX_UNLOCK(vpath);
935 vxge_vpath_t *vpath = (vxge_vpath_t *) userdata;
942 bus_dmamap_sync(vpath->dma_tag_tx, txdl_priv->dma_map,
945 bus_dmamap_unload(vpath->dma_tag_tx, txdl_priv->dma_map);
946 bus_dmamap_destroy(vpath->dma_tag_tx, txdl_priv->dma_map);
951 vxge_hal_fifo_txdl_free(vpath->handle, txdlh);
966 vxge_vpath_t *vpath = (vxge_vpath_t *) userdata;
970 err = bus_dmamap_create(vpath->dma_tag_rx, BUS_DMA_NOWAIT,
973 if (vxge_rx_rxd_1b_set(vpath, rxdh, dtr_priv)) {
974 bus_dmamap_destroy(vpath->dma_tag_rx,
996 vxge_vpath_t *vpath = (vxge_vpath_t *) userdata;
997 vxge_dev_t *vdev = vpath->vdev;
1000 struct lro_ctrl *lro = &vpath->lro;
1012 VXGE_DRV_STATS(vpath, rx_compl);
1016 vxge_rx_rxd_1b_get(vpath, rxdh, dtr_priv);
1022 * current descriptor and post descriptor back to ring vpath
1028 VXGE_DRV_STATS(vpath, rx_tcode);
1047 if (vxge_rx_rxd_1b_set(vpath, rxdh, dtr_priv)) {
1050 * to vpath for future processing of same packet.
1059 /* post descriptor with newly allocated mbuf back to vpath */
1061 vpath->rxd_posted++;
1063 if (vpath->rxd_posted % VXGE_RXD_REPLENISH_COUNT == 0)
1074 mbuf_up->m_pkthdr.flowid = vpath->vp_index;
1077 bus_dmamap_sync(vpath->dma_tag_rx, rxd_priv->dma_map,
1080 vxge_rx_input(ifp, mbuf_up, vpath);
1086 if (vpath->lro_enable && vpath->lro.lro_cnt) {
1097 vxge_rx_input(ifnet_t ifp, mbuf_t mbuf_up, vxge_vpath_t *vpath)
1099 if (vpath->lro_enable && vpath->lro.lro_cnt) {
1100 if (tcp_lro_rx(&vpath->lro, mbuf_up, 0) == 0)
1132 * @vpath_handle Rx vpath Handle @rxdh Rx Descriptor Handle @state Descriptor
1133 * State @userdata Per-adapter Data @reopen vpath open/reopen option
1141 vxge_vpath_t *vpath = (vxge_vpath_t *) userdata;
1148 bus_dmamap_sync(vpath->dma_tag_rx, rxd_priv->dma_map,
1150 bus_dmamap_unload(vpath->dma_tag_rx, rxd_priv->dma_map);
1151 bus_dmamap_destroy(vpath->dma_tag_rx, rxd_priv->dma_map);
1164 vxge_rx_rxd_1b_get(vxge_vpath_t *vpath, vxge_hal_rxd_h rxdh, void *dtr_priv)
1170 vxge_hal_ring_rxd_1b_get(vpath->handle, rxdh, &rxd_priv->dma_addr[0],
1184 vxge_rx_rxd_1b_set(vxge_vpath_t *vpath, vxge_hal_rxd_h rxdh, void *dtr_priv)
1193 vxge_dev_t *vdev = vpath->vdev;
1198 VXGE_DRV_STATS(vpath, rx_no_buf);
1209 err = vxge_dma_mbuf_coalesce(vpath->dma_tag_rx, vpath->extra_dma_map,
1212 VXGE_DRV_STATS(vpath, rx_map_fail);
1218 bus_dmamap_sync(vpath->dma_tag_rx, rxd_priv->dma_map,
1220 bus_dmamap_unload(vpath->dma_tag_rx, rxd_priv->dma_map);
1226 rxd_priv->dma_map = vpath->extra_dma_map;
1227 vpath->extra_dma_map = dma_map;
1230 bus_dmamap_sync(vpath->dma_tag_rx, rxd_priv->dma_map,
1249 vxge_vpath_t *vpath;
1259 vpath = &(vdev->vpaths[i]);
1260 vxge_hal_vpath_tti_ci_set(vpath->handle);
1261 vxge_hal_vpath_rti_ci_set(vpath->handle);
1284 vxge_vpath_t *vpath;
1291 vpath = &(vdev->vpaths[i]);
1292 vxge_hal_vpath_tti_ci_reset(vpath->handle);
1293 vxge_hal_vpath_rti_ci_reset(vpath->handle);
1430 vxge_vpath_t *vpath;
1448 vpath = &vdev->vpaths[irq_rid / 4];
1452 isr_func_arg = (void *) vpath;
1455 isr_func_arg = (void *) vpath;
1520 vxge_vpath_t *vpath = (vxge_vpath_t *) vpath_ptr;
1521 vxge_dev_t *vdev = vpath->vdev;
1522 hal_vpath = ((__hal_vpath_handle_t *) vpath->handle)->vpath;
1524 VXGE_DRV_STATS(vpath, isr_msix);
1527 vxge_hal_vpath_mf_msix_mask(vpath->handle, vpath->msix_vec);
1530 vxge_hal_vpath_poll_rx(vpath->handle, &got_rx);
1534 vxge_intr_coalesce_tx(vpath);
1535 vxge_hal_vpath_poll_tx(vpath->handle, &got_tx);
1538 vxge_hal_vpath_mf_msix_unmask(vpath->handle, vpath->msix_vec);
1547 vxge_vpath_t *vpath = (vxge_vpath_t *) vpath_ptr;
1548 vxge_dev_t *vdev = vpath->vdev;
1552 /* Process alarms in each vpath */
1555 vpath = &(vdev->vpaths[i]);
1556 vxge_hal_vpath_mf_msix_mask(vpath->handle,
1557 vpath->msix_vec_alarm);
1558 status = vxge_hal_vpath_alarm_process(vpath->handle, 0);
1569 vxge_hal_vpath_mf_msix_unmask(vpath->handle,
1570 vpath->msix_vec_alarm);
1582 vxge_vpath_t *vpath;
1593 vpath = vdev->vpaths + i;
1596 msix_id = vpath->vp_id * VXGE_HAL_VPATH_MSIX_ACTIVE;
1597 tim[1] = vpath->msix_vec = msix_id + 1;
1599 vpath->msix_vec_alarm = first_vp_id *
1602 status = vxge_hal_vpath_mf_msix_set(vpath->handle,
1607 "failed to set msix vectors to vpath\n");
1611 vxge_hal_vpath_mf_msix_unmask(vpath->handle, vpath->msix_vec);
1612 vxge_hal_vpath_mf_msix_unmask(vpath->handle,
1613 vpath->msix_vec_alarm);
2083 /* Filling matable with bucket-to-vpath mapping */
2097 /* set indirection table, bucket-to-vpath mapping */
2116 "rth configuration failed for vpath (%d)\n",
2263 vxge_vpath_t *vpath;
2272 vpath = &(vdev->vpaths[i]);
2273 lro = &vpath->lro;
2276 vpath_attr.vp_id = vpath->vp_id;
2280 vpath_attr.fifo_attr.userdata = vpath;
2287 vpath_attr.ring_attr.userdata = vpath;
2290 err = vxge_dma_tags_create(vpath);
2297 vpath->br = buf_ring_alloc(VXGE_DEFAULT_BR_SIZE, M_DEVBUF,
2298 M_WAITOK, &vpath->mtx_tx);
2299 if (vpath->br == NULL) {
2306 NULL, &vpath->handle);
2309 "failed to open vpath (%d)\n", vpath->vp_id);
2313 vpath->is_open = TRUE;
2314 vdev->vpath_handles[i] = vpath->handle;
2316 vpath->tx_ticks = ticks;
2317 vpath->rx_ticks = ticks;
2319 vpath->tti_rtimer_val = VXGE_DEFAULT_TTI_RTIMER_VAL;
2320 vpath->tti_rtimer_val = VXGE_DEFAULT_TTI_RTIMER_VAL;
2322 vpath->tx_intr_coalesce = vdev->config.intr_coalesce;
2323 vpath->rx_intr_coalesce = vdev->config.intr_coalesce;
2330 vpath->tx_intr_coalesce = 0;
2340 vpath->lro_enable = TRUE;
2426 vxge_vpath_t *vpath;
2430 vpath = &(vdev->vpaths[i]);
2431 if (vpath->handle)
2432 vxge_hal_vpath_close(vpath->handle);
2435 if (vpath->br != NULL)
2436 buf_ring_free(vpath->br, M_DEVBUF);
2439 if (vpath->lro_enable)
2440 tcp_lro_free(&vpath->lro);
2442 if (vpath->dma_tag_rx) {
2443 bus_dmamap_destroy(vpath->dma_tag_rx,
2444 vpath->extra_dma_map);
2445 bus_dma_tag_destroy(vpath->dma_tag_rx);
2448 if (vpath->dma_tag_tx)
2449 bus_dma_tag_destroy(vpath->dma_tag_tx);
2451 vpath->handle = NULL;
2452 vpath->is_open = FALSE;
2474 "failed to reset vpath :%d\n", i);
2928 vxge_dma_tags_create(vxge_vpath_t *vpath)
2932 vxge_dev_t *vdev = vpath->vdev;
2963 &(vpath->dma_tag_tx));
2982 &(vpath->dma_tag_rx));
2987 err = bus_dmamap_create(vpath->dma_tag_rx, BUS_DMA_NOWAIT,
2988 &vpath->extra_dma_map);
2992 bus_dma_tag_destroy(vpath->dma_tag_rx);
2995 bus_dma_tag_destroy(vpath->dma_tag_tx);
3719 vxge_vpath_t *vpath;
3770 vpath = &(vdev->vpaths[*((u32 *) reg_info + 1)]);
3771 vp_id = vpath->vp_id;
3777 vpath = &(vdev->vpaths[*((u32 *) reg_info + 1)]);
3778 vp_id = vpath->vp_id;
3818 vxge_vpath_t *vpath;
3908 vpath = &(vdev->vpaths[i]);
3910 vpath->driver_stats.rx_lro_queued +=
3911 vpath->lro.lro_queued;
3913 vpath->driver_stats.rx_lro_flushed +=
3914 vpath->lro.lro_flushed;
3917 &(vpath->driver_stats),
4114 vxge_intr_coalesce_tx(vxge_vpath_t *vpath)
4118 if (!vpath->tx_intr_coalesce)
4121 vpath->tx_interrupts++;
4122 if (ticks > vpath->tx_ticks + hz/100) {
4124 vpath->tx_ticks = ticks;
4125 timer = vpath->tti_rtimer_val;
4126 if (vpath->tx_interrupts > VXGE_MAX_TX_INTERRUPT_COUNT) {
4128 vpath->tti_rtimer_val =
4132 vpath->handle, vpath->tti_rtimer_val);
4136 vpath->tti_rtimer_val = 0;
4138 vpath->handle, vpath->tti_rtimer_val);
4141 vpath->tx_interrupts = 0;
4151 vxge_intr_coalesce_rx(vxge_vpath_t *vpath)
4155 if (!vpath->rx_intr_coalesce)
4158 vpath->rx_interrupts++;
4159 if (ticks > vpath->rx_ticks + hz/100) {
4161 vpath->rx_ticks = ticks;
4162 timer = vpath->rti_rtimer_val;
4164 if (vpath->rx_interrupts > VXGE_MAX_RX_INTERRUPT_COUNT) {
4166 vpath->rti_rtimer_val =
4170 vpath->handle, vpath->rti_rtimer_val);
4174 vpath->rti_rtimer_val = 0;
4176 vpath->handle, vpath->rti_rtimer_val);
4179 vpath->rx_interrupts = 0;