usb/controller/dwc_otg_atmelarm.c

67 	struct dwc_otg_softc sc_otg;	/* must be first */
85 	sc->sc_otg.sc_bus.parent = dev;
86 	sc->sc_otg.sc_bus.devices = sc->sc_otg.sc_devices;
87 	sc->sc_otg.sc_bus.devices_max = DWC_OTG_MAX_DEVICES;
88 	sc->sc_otg.sc_bus.dma_bits = 32;
91 	if (usb_bus_mem_alloc_all(&sc->sc_otg.sc_bus,
96 	sc->sc_otg.sc_io_res =
99 	if (!(sc->sc_otg.sc_io_res)) {
103 	sc->sc_otg.sc_io_tag = rman_get_bustag(sc->sc_otg.sc_io_res);
104 	sc->sc_otg.sc_io_hdl = rman_get_bushandle(sc->sc_otg.sc_io_res);
105 	sc->sc_otg.sc_io_size = rman_get_size(sc->sc_otg.sc_io_res);
108 	sc->sc_otg.sc_irq_res =
110 	if (sc->sc_otg.sc_irq_res == NULL)
113 	sc->sc_otg.sc_bus.bdev = device_add_child(dev, "usbus", -1);
114 	if (sc->sc_otg.sc_bus.bdev == NULL)
117 	device_set_ivars(sc->sc_otg.sc_bus.bdev, &sc->sc_otg.sc_bus);
119 	err = bus_setup_intr(dev, sc->sc_otg.sc_irq_res, INTR_TYPE_BIO | INTR_MPSAFE,
120 	    &dwc_otg_filter_interrupt, &dwc_otg_interrupt, sc, &sc->sc_otg.sc_intr_hdl);
122 		sc->sc_otg.sc_intr_hdl = NULL;
125 	err = dwc_otg_init(&sc->sc_otg);
127 		err = device_probe_and_attach(sc->sc_otg.sc_bus.bdev);
145 	if (sc->sc_otg.sc_bus.bdev) {
146 		bdev = sc->sc_otg.sc_bus.bdev;
153 	if (sc->sc_otg.sc_irq_res && sc->sc_otg.sc_intr_hdl) {
157 		dwc_otg_uninit(&sc->sc_otg);
159 		err = bus_teardown_intr(dev, sc->sc_otg.sc_irq_res,
160 		    sc->sc_otg.sc_intr_hdl);
161 		sc->sc_otg.sc_intr_hdl = NULL;
164 	if (sc->sc_otg.sc_irq_res) {
166 		    sc->sc_otg.sc_irq_res);
167 		sc->sc_otg.sc_irq_res = NULL;
170 	if (sc->sc_otg.sc_io_res) {
172 		    sc->sc_otg.sc_io_res);
173 		sc->sc_otg.sc_io_res = NULL;
175 	usb_bus_mem_free_all(&sc->sc_otg.sc_bus, NULL);