Lines Matching defs:ctrlr
45 static void nvme_ctrlr_construct_and_submit_aer(struct nvme_controller *ctrlr,
47 static void nvme_ctrlr_setup_interrupts(struct nvme_controller *ctrlr);
50 nvme_ctrlr_allocate_bar(struct nvme_controller *ctrlr)
53 ctrlr->resource_id = PCIR_BAR(0);
55 ctrlr->resource = bus_alloc_resource(ctrlr->dev, SYS_RES_MEMORY,
56 &ctrlr->resource_id, 0, ~0, 1, RF_ACTIVE);
58 if(ctrlr->resource == NULL) {
59 nvme_printf(ctrlr, "unable to allocate pci resource\n");
63 ctrlr->bus_tag = rman_get_bustag(ctrlr->resource);
64 ctrlr->bus_handle = rman_get_bushandle(ctrlr->resource);
65 ctrlr->regs = (struct nvme_registers *)ctrlr->bus_handle;
74 ctrlr->bar4_resource_id = PCIR_BAR(4);
75 ctrlr->bar4_resource = bus_alloc_resource(ctrlr->dev, SYS_RES_MEMORY,
76 &ctrlr->bar4_resource_id, 0, ~0, 1, RF_ACTIVE);
82 nvme_ctrlr_construct_admin_qpair(struct nvme_controller *ctrlr)
87 qpair = &ctrlr->adminq;
97 nvme_printf(ctrlr, "invalid hw.nvme.admin_entries=%d "
111 ctrlr);
115 nvme_ctrlr_construct_io_qpairs(struct nvme_controller *ctrlr)
129 cap_lo.raw = nvme_mmio_read_4(ctrlr, cap_lo);
149 ctrlr->num_cpus_per_ioq = howmany(mp_ncpus, ctrlr->num_io_queues);
151 ctrlr->ioq = malloc(ctrlr->num_io_queues * sizeof(struct nvme_qpair),
154 for (i = 0; i < ctrlr->num_io_queues; i++) {
155 qpair = &ctrlr->ioq[i];
166 ctrlr->msix_enabled ? i+1 : 0, /* vector */
169 ctrlr);
175 if (ctrlr->num_io_queues > 1)
176 bus_bind_intr(ctrlr->dev, qpair->res,
177 i * ctrlr->num_cpus_per_ioq);
184 nvme_ctrlr_fail(struct nvme_controller *ctrlr)
188 ctrlr->is_failed = TRUE;
189 nvme_qpair_fail(&ctrlr->adminq);
190 for (i = 0; i < ctrlr->num_io_queues; i++)
191 nvme_qpair_fail(&ctrlr->ioq[i]);
192 nvme_notify_fail_consumers(ctrlr);
196 nvme_ctrlr_post_failed_request(struct nvme_controller *ctrlr,
200 mtx_lock(&ctrlr->lock);
201 STAILQ_INSERT_TAIL(&ctrlr->fail_req, req, stailq);
202 mtx_unlock(&ctrlr->lock);
203 taskqueue_enqueue(ctrlr->taskqueue, &ctrlr->fail_req_task);
209 struct nvme_controller *ctrlr = arg;
212 mtx_lock(&ctrlr->lock);
213 while (!STAILQ_EMPTY(&ctrlr->fail_req)) {
214 req = STAILQ_FIRST(&ctrlr->fail_req);
215 STAILQ_REMOVE_HEAD(&ctrlr->fail_req, stailq);
219 mtx_unlock(&ctrlr->lock);
223 nvme_ctrlr_wait_for_ready(struct nvme_controller *ctrlr, int desired_val)
229 cc.raw = nvme_mmio_read_4(ctrlr, cc);
230 csts.raw = nvme_mmio_read_4(ctrlr, csts);
233 nvme_printf(ctrlr, "%s called with desired_val = %d "
242 if (ms_waited++ > ctrlr->ready_timeout_in_ms) {
243 nvme_printf(ctrlr, "controller ready did not become %d "
244 "within %d ms\n", desired_val, ctrlr->ready_timeout_in_ms);
247 csts.raw = nvme_mmio_read_4(ctrlr, csts);
254 nvme_ctrlr_disable(struct nvme_controller *ctrlr)
259 cc.raw = nvme_mmio_read_4(ctrlr, cc);
260 csts.raw = nvme_mmio_read_4(ctrlr, csts);
263 nvme_ctrlr_wait_for_ready(ctrlr, 1);
266 nvme_mmio_write_4(ctrlr, cc, cc.raw);
268 nvme_ctrlr_wait_for_ready(ctrlr, 0);
272 nvme_ctrlr_enable(struct nvme_controller *ctrlr)
278 cc.raw = nvme_mmio_read_4(ctrlr, cc);
279 csts.raw = nvme_mmio_read_4(ctrlr, csts);
285 return (nvme_ctrlr_wait_for_ready(ctrlr, 1));
288 nvme_mmio_write_8(ctrlr, asq, ctrlr->adminq.cmd_bus_addr);
290 nvme_mmio_write_8(ctrlr, acq, ctrlr->adminq.cpl_bus_addr);
295 aqa.bits.acqs = ctrlr->adminq.num_entries-1;
296 aqa.bits.asqs = ctrlr->adminq.num_entries-1;
297 nvme_mmio_write_4(ctrlr, aqa, aqa.raw);
310 nvme_mmio_write_4(ctrlr, cc, cc.raw);
313 return (nvme_ctrlr_wait_for_ready(ctrlr, 1));
317 nvme_ctrlr_hw_reset(struct nvme_controller *ctrlr)
321 nvme_admin_qpair_disable(&ctrlr->adminq);
327 if (ctrlr->is_initialized) {
328 for (i = 0; i < ctrlr->num_io_queues; i++)
329 nvme_io_qpair_disable(&ctrlr->ioq[i]);
334 nvme_ctrlr_disable(ctrlr);
335 return (nvme_ctrlr_enable(ctrlr));
339 nvme_ctrlr_reset(struct nvme_controller *ctrlr)
343 cmpset = atomic_cmpset_32(&ctrlr->is_resetting, 0, 1);
345 if (cmpset == 0 || ctrlr->is_failed)
353 taskqueue_enqueue(ctrlr->taskqueue, &ctrlr->reset_task);
357 nvme_ctrlr_identify(struct nvme_controller *ctrlr)
362 nvme_ctrlr_cmd_identify_controller(ctrlr, &ctrlr->cdata,
367 nvme_printf(ctrlr, "nvme_identify_controller failed!\n");
375 if (ctrlr->cdata.mdts > 0)
376 ctrlr->max_xfer_size = min(ctrlr->max_xfer_size,
377 ctrlr->min_page_size * (1 << (ctrlr->cdata.mdts)));
383 nvme_ctrlr_set_num_qpairs(struct nvme_controller *ctrlr)
389 nvme_ctrlr_cmd_set_num_queues(ctrlr, ctrlr->num_io_queues,
394 nvme_printf(ctrlr, "nvme_set_num_queues failed!\n");
411 ctrlr->num_io_queues = min(ctrlr->num_io_queues, sq_allocated);
412 ctrlr->num_io_queues = min(ctrlr->num_io_queues, cq_allocated);
418 nvme_ctrlr_create_qpairs(struct nvme_controller *ctrlr)
424 for (i = 0; i < ctrlr->num_io_queues; i++) {
425 qpair = &ctrlr->ioq[i];
428 nvme_ctrlr_cmd_create_io_cq(ctrlr, qpair, qpair->vector,
433 nvme_printf(ctrlr, "nvme_create_io_cq failed!\n");
438 nvme_ctrlr_cmd_create_io_sq(qpair->ctrlr, qpair,
443 nvme_printf(ctrlr, "nvme_create_io_sq failed!\n");
452 nvme_ctrlr_construct_namespaces(struct nvme_controller *ctrlr)
457 for (i = 0; i < ctrlr->cdata.nn; i++) {
458 ns = &ctrlr->ns[i];
459 status = nvme_ns_construct(ns, i+1, ctrlr);
482 nvme_ctrlr_get_log_page_size(struct nvme_controller *ctrlr, uint8_t page_id)
490 ctrlr->cdata.elpe,
508 nvme_ctrlr_log_critical_warnings(struct nvme_controller *ctrlr,
513 nvme_printf(ctrlr, "available spare space below threshold\n");
516 nvme_printf(ctrlr, "temperature above threshold\n");
519 nvme_printf(ctrlr, "device reliability degraded\n");
522 nvme_printf(ctrlr, "media placed in read only mode\n");
525 nvme_printf(ctrlr, "volatile memory backup device failed\n");
528 nvme_printf(ctrlr,
544 nvme_notify_async_consumers(aer->ctrlr, &aer->cpl,
550 nvme_ctrlr_log_critical_warnings(aer->ctrlr,
559 aer->ctrlr->async_event_config.raw &=
561 nvme_ctrlr_cmd_set_async_event_config(aer->ctrlr,
562 aer->ctrlr->async_event_config, NULL, NULL);
570 nvme_notify_async_consumers(aer->ctrlr, &aer->cpl,
578 nvme_ctrlr_construct_and_submit_aer(aer->ctrlr, aer);
599 nvme_printf(aer->ctrlr, "async event occurred (log page id=0x%x)\n",
603 aer->log_page_size = nvme_ctrlr_get_log_page_size(aer->ctrlr,
606 nvme_ctrlr_cmd_get_log_page(aer->ctrlr, aer->log_page_id,
612 nvme_notify_async_consumers(aer->ctrlr, cpl, aer->log_page_id,
619 nvme_ctrlr_construct_and_submit_aer(aer->ctrlr, aer);
624 nvme_ctrlr_construct_and_submit_aer(struct nvme_controller *ctrlr,
629 aer->ctrlr = ctrlr;
639 nvme_ctrlr_submit_admin_request(ctrlr, req);
643 nvme_ctrlr_configure_aer(struct nvme_controller *ctrlr)
649 ctrlr->async_event_config.raw = 0xFF;
650 ctrlr->async_event_config.bits.reserved = 0;
653 nvme_ctrlr_cmd_get_feature(ctrlr, NVME_FEAT_TEMPERATURE_THRESHOLD,
660 nvme_printf(ctrlr, "temperature threshold not supported\n");
661 ctrlr->async_event_config.bits.temperature = 0;
664 nvme_ctrlr_cmd_set_async_event_config(ctrlr,
665 ctrlr->async_event_config, NULL, NULL);
668 ctrlr->num_aers = min(NVME_MAX_ASYNC_EVENTS, (ctrlr->cdata.aerl+1));
670 for (i = 0; i < ctrlr->num_aers; i++) {
671 aer = &ctrlr->aer[i];
672 nvme_ctrlr_construct_and_submit_aer(ctrlr, aer);
677 nvme_ctrlr_configure_int_coalescing(struct nvme_controller *ctrlr)
680 ctrlr->int_coal_time = 0;
682 &ctrlr->int_coal_time);
684 ctrlr->int_coal_threshold = 0;
686 &ctrlr->int_coal_threshold);
688 nvme_ctrlr_cmd_set_interrupt_coalescing(ctrlr, ctrlr->int_coal_time,
689 ctrlr->int_coal_threshold, NULL, NULL);
695 struct nvme_controller *ctrlr = ctrlr_arg;
706 if (ctrlr->is_resetting) {
707 nvme_qpair_reset(&ctrlr->adminq);
710 for (i = 0; i < ctrlr->num_io_queues; i++)
711 nvme_qpair_reset(&ctrlr->ioq[i]);
713 nvme_admin_qpair_enable(&ctrlr->adminq);
715 if (nvme_ctrlr_identify(ctrlr) != 0) {
716 nvme_ctrlr_fail(ctrlr);
728 if (ctrlr->is_resetting) {
729 old_num_io_queues = ctrlr->num_io_queues;
730 if (nvme_ctrlr_set_num_qpairs(ctrlr) != 0) {
731 nvme_ctrlr_fail(ctrlr);
735 if (old_num_io_queues != ctrlr->num_io_queues) {
737 old_num_io_queues, ctrlr->num_io_queues);
741 if (nvme_ctrlr_create_qpairs(ctrlr) != 0) {
742 nvme_ctrlr_fail(ctrlr);
746 if (nvme_ctrlr_construct_namespaces(ctrlr) != 0) {
747 nvme_ctrlr_fail(ctrlr);
751 nvme_ctrlr_configure_aer(ctrlr);
752 nvme_ctrlr_configure_int_coalescing(ctrlr);
754 for (i = 0; i < ctrlr->num_io_queues; i++)
755 nvme_io_qpair_enable(&ctrlr->ioq[i]);
761 struct nvme_controller *ctrlr = arg;
763 nvme_qpair_reset(&ctrlr->adminq);
764 nvme_admin_qpair_enable(&ctrlr->adminq);
766 if (nvme_ctrlr_set_num_qpairs(ctrlr) == 0 &&
767 nvme_ctrlr_construct_io_qpairs(ctrlr) == 0)
768 nvme_ctrlr_start(ctrlr);
770 nvme_ctrlr_fail(ctrlr);
772 nvme_sysctl_initialize_ctrlr(ctrlr);
773 config_intrhook_disestablish(&ctrlr->config_hook);
775 ctrlr->is_initialized = 1;
776 nvme_notify_new_controller(ctrlr);
782 struct nvme_controller *ctrlr = arg;
785 nvme_printf(ctrlr, "resetting controller\n");
786 status = nvme_ctrlr_hw_reset(ctrlr);
797 nvme_ctrlr_start(ctrlr);
799 nvme_ctrlr_fail(ctrlr);
801 atomic_cmpset_32(&ctrlr->is_resetting, 1, 0);
807 struct nvme_controller *ctrlr = arg;
809 nvme_mmio_write_4(ctrlr, intms, 1);
811 nvme_qpair_process_completions(&ctrlr->adminq);
813 if (ctrlr->ioq && ctrlr->ioq[0].cpl)
814 nvme_qpair_process_completions(&ctrlr->ioq[0]);
816 nvme_mmio_write_4(ctrlr, intmc, 1);
820 nvme_ctrlr_configure_intx(struct nvme_controller *ctrlr)
823 ctrlr->msix_enabled = 0;
824 ctrlr->num_io_queues = 1;
825 ctrlr->num_cpus_per_ioq = mp_ncpus;
826 ctrlr->rid = 0;
827 ctrlr->res = bus_alloc_resource_any(ctrlr->dev, SYS_RES_IRQ,
828 &ctrlr->rid, RF_SHAREABLE | RF_ACTIVE);
830 if (ctrlr->res == NULL) {
831 nvme_printf(ctrlr, "unable to allocate shared IRQ\n");
835 bus_setup_intr(ctrlr->dev, ctrlr->res,
837 ctrlr, &ctrlr->tag);
839 if (ctrlr->tag == NULL) {
840 nvme_printf(ctrlr, "unable to setup intx handler\n");
863 nvme_ctrlr_passthrough_cmd(struct nvme_controller *ctrlr,
873 if (pt->len > ctrlr->max_xfer_size) {
874 nvme_printf(ctrlr, "pt->len (%d) "
876 ctrlr->max_xfer_size);
917 mtx = &ctrlr->lock;
919 mtx = &ctrlr->ns[nsid-1].lock;
925 nvme_ctrlr_submit_admin_request(ctrlr, req);
927 nvme_ctrlr_submit_io_request(ctrlr, req);
947 struct nvme_controller *ctrlr;
950 ctrlr = cdev->si_drv1;
954 nvme_ctrlr_reset(ctrlr);
958 return (nvme_ctrlr_passthrough_cmd(ctrlr, pt, pt->cmd.nsid,
974 nvme_ctrlr_setup_interrupts(struct nvme_controller *ctrlr)
982 dev = ctrlr->dev;
999 ctrlr->force_intx = 0;
1000 TUNABLE_INT_FETCH("hw.nvme.force_intx", &ctrlr->force_intx);
1019 if (ctrlr->force_intx || num_vectors_available < 2) {
1020 nvme_ctrlr_configure_intx(ctrlr);
1028 ctrlr->num_cpus_per_ioq = max(min_cpus_per_ioq,
1031 ctrlr->num_io_queues = howmany(mp_ncpus, ctrlr->num_cpus_per_ioq);
1032 num_vectors_requested = ctrlr->num_io_queues + 1;
1042 nvme_ctrlr_configure_intx(ctrlr);
1048 nvme_ctrlr_configure_intx(ctrlr);
1052 ctrlr->msix_enabled = 1;
1056 nvme_ctrlr_construct(struct nvme_controller *ctrlr, device_t dev)
1062 ctrlr->dev = dev;
1064 mtx_init(&ctrlr->lock, "nvme ctrlr lock", NULL, MTX_DEF);
1066 status = nvme_ctrlr_allocate_bar(ctrlr);
1075 cap_hi.raw = nvme_mmio_read_4(ctrlr, cap_hi);
1079 ctrlr->min_page_size = 1 << (12 + cap_hi.bits.mpsmin);
1082 cap_lo.raw = nvme_mmio_read_4(ctrlr, cap_lo);
1083 ctrlr->ready_timeout_in_ms = cap_lo.bits.to * 500;
1089 ctrlr->timeout_period = timeout_period;
1094 ctrlr->enable_aborts = 0;
1095 TUNABLE_INT_FETCH("hw.nvme.enable_aborts", &ctrlr->enable_aborts);
1097 nvme_ctrlr_setup_interrupts(ctrlr);
1099 ctrlr->max_xfer_size = NVME_MAX_XFER_SIZE;
1100 nvme_ctrlr_construct_admin_qpair(ctrlr);
1102 ctrlr->cdev = make_dev(&nvme_ctrlr_cdevsw, device_get_unit(dev),
1105 if (ctrlr->cdev == NULL)
1108 ctrlr->cdev->si_drv1 = (void *)ctrlr;
1110 ctrlr->taskqueue = taskqueue_create("nvme_taskq", M_WAITOK,
1111 taskqueue_thread_enqueue, &ctrlr->taskqueue);
1112 taskqueue_start_threads(&ctrlr->taskqueue, 1, PI_DISK, "nvme taskq");
1114 ctrlr->is_resetting = 0;
1115 ctrlr->is_initialized = 0;
1116 ctrlr->notification_sent = 0;
1117 TASK_INIT(&ctrlr->reset_task, 0, nvme_ctrlr_reset_task, ctrlr);
1119 TASK_INIT(&ctrlr->fail_req_task, 0, nvme_ctrlr_fail_req_task, ctrlr);
1120 STAILQ_INIT(&ctrlr->fail_req);
1121 ctrlr->is_failed = FALSE;
1127 nvme_ctrlr_destruct(struct nvme_controller *ctrlr, device_t dev)
1138 nvme_ctrlr_shutdown(ctrlr);
1140 nvme_ctrlr_disable(ctrlr);
1141 taskqueue_free(ctrlr->taskqueue);
1144 nvme_ns_destruct(&ctrlr->ns[i]);
1146 if (ctrlr->cdev)
1147 destroy_dev(ctrlr->cdev);
1149 for (i = 0; i < ctrlr->num_io_queues; i++) {
1150 nvme_io_qpair_destroy(&ctrlr->ioq[i]);
1153 free(ctrlr->ioq, M_NVME);
1155 nvme_admin_qpair_destroy(&ctrlr->adminq);
1157 if (ctrlr->resource != NULL) {
1159 ctrlr->resource_id, ctrlr->resource);
1162 if (ctrlr->bar4_resource != NULL) {
1164 ctrlr->bar4_resource_id, ctrlr->bar4_resource);
1167 if (ctrlr->tag)
1168 bus_teardown_intr(ctrlr->dev, ctrlr->res, ctrlr->tag);
1170 if (ctrlr->res)
1171 bus_release_resource(ctrlr->dev, SYS_RES_IRQ,
1172 rman_get_rid(ctrlr->res), ctrlr->res);
1174 if (ctrlr->msix_enabled)
1179 nvme_ctrlr_shutdown(struct nvme_controller *ctrlr)
1185 cc.raw = nvme_mmio_read_4(ctrlr, cc);
1187 nvme_mmio_write_4(ctrlr, cc, cc.raw);
1188 csts.raw = nvme_mmio_read_4(ctrlr, csts);
1191 csts.raw = nvme_mmio_read_4(ctrlr, csts);
1194 nvme_printf(ctrlr, "did not complete shutdown within 5 seconds "
1199 nvme_ctrlr_submit_admin_request(struct nvme_controller *ctrlr,
1203 nvme_qpair_submit_request(&ctrlr->adminq, req);
1207 nvme_ctrlr_submit_io_request(struct nvme_controller *ctrlr,
1212 qpair = &ctrlr->ioq[curcpu / ctrlr->num_cpus_per_ioq];
1217 nvme_ctrlr_get_device(struct nvme_controller *ctrlr)
1220 return (ctrlr->dev);
1224 nvme_ctrlr_get_data(struct nvme_controller *ctrlr)
1227 return (&ctrlr->cdata);