Lines Matching defs:command
605 u32 i, data, command;
607 /* Setup and write the address cycle command */
608 command = ((reg_addr << IXGBE_MSCA_NP_ADDR_SHIFT) |
613 IXGBE_WRITE_REG(hw, IXGBE_MSCA, command);
623 command = IXGBE_READ_REG(hw, IXGBE_MSCA);
624 if ((command & IXGBE_MSCA_MDI_COMMAND) == 0)
629 if ((command & IXGBE_MSCA_MDI_COMMAND) != 0) {
630 ERROR_REPORT1(IXGBE_ERROR_POLLING, "PHY address command did not complete.\n");
636 * command
638 command = ((reg_addr << IXGBE_MSCA_NP_ADDR_SHIFT) |
643 IXGBE_WRITE_REG(hw, IXGBE_MSCA, command);
653 command = IXGBE_READ_REG(hw, IXGBE_MSCA);
654 if ((command & IXGBE_MSCA_MDI_COMMAND) == 0)
658 if ((command & IXGBE_MSCA_MDI_COMMAND) != 0) {
659 ERROR_REPORT1(IXGBE_ERROR_POLLING, "PHY read command didn't complete\n");
711 u32 i, command;
716 /* Setup and write the address cycle command */
717 command = ((reg_addr << IXGBE_MSCA_NP_ADDR_SHIFT) |
722 IXGBE_WRITE_REG(hw, IXGBE_MSCA, command);
732 command = IXGBE_READ_REG(hw, IXGBE_MSCA);
733 if ((command & IXGBE_MSCA_MDI_COMMAND) == 0)
737 if ((command & IXGBE_MSCA_MDI_COMMAND) != 0) {
744 * command
746 command = ((reg_addr << IXGBE_MSCA_NP_ADDR_SHIFT) |
751 IXGBE_WRITE_REG(hw, IXGBE_MSCA, command);
761 command = IXGBE_READ_REG(hw, IXGBE_MSCA);
762 if ((command & IXGBE_MSCA_MDI_COMMAND) == 0)
766 if ((command & IXGBE_MSCA_MDI_COMMAND) != 0) {