Lines Matching refs:VAL
476 #define WRITE4(SC,OFF,VAL) bus_space_write_4(SC->memt, SC->memh, (OFF), (VAL))
477 #define WRITE2(SC,OFF,VAL) bus_space_write_2(SC->memt, SC->memh, (OFF), (VAL))
478 #define WRITE1(SC,OFF,VAL) bus_space_write_1(SC->memt, SC->memh, (OFF), (VAL))
488 #define WRITE_SUNI(SC,OFF,VAL) WRITE4(SC, HE_REGO_SUNI + 4 * (OFF), (VAL))
499 #define WRITE_LB4(SC,OFF,VAL) \
502 WRITE4(SC, HE_REGO_LB_MEM_DATA, (VAL)); \
509 #define WRITE_MEM4(SC,OFF,VAL,SPACE) \
511 WRITE4(SC, HE_REGO_CON_DAT, (VAL)); \
527 #define WRITE_TCM4(SC,OFF,VAL) WRITE_MEM4(SC,(OFF),(VAL),HE_REGM_CON_TCM)
528 #define WRITE_RCM4(SC,OFF,VAL) WRITE_MEM4(SC,(OFF),(VAL),HE_REGM_CON_RCM)
529 #define WRITE_MBOX4(SC,OFF,VAL) WRITE_MEM4(SC,(OFF),(VAL),HE_REGM_CON_MBOX)
535 #define WRITE_TCM(SC,OFF,BYTES,VAL) \
537 (VAL), HE_REGM_CON_TCM)
538 #define WRITE_RCM(SC,OFF,BYTES,VAL) \
540 (VAL), HE_REGM_CON_RCM)
557 #define WRITE_TSR(SC,CID,NR,BEN,VAL) \
560 WRITE_TCM(SC, HE_REGO_TSRA(0,CID,NR),BEN,VAL); \
562 WRITE_TCM(SC, HE_REGO_TSRB((SC)->tsrb,CID,(NR-8)),BEN,VAL);\
564 WRITE_TCM(SC, HE_REGO_TSRC((SC)->tsrc,CID,(NR-12)),BEN,VAL);\
566 WRITE_TCM(SC, HE_REGO_TSRD((SC)->tsrd,CID),BEN,VAL); \
581 #define WRITE_RSR(SC,CID,NR,BEN,VAL) \
584 WRITE_RCM(SC, HE_REGO_RSRA(0,CID,NR),BEN,VAL); \
586 WRITE_RCM(SC, HE_REGO_RSRB((SC)->rsrb,CID,(NR-8)),BEN,VAL);\