Lines Matching refs:port
41 /* standard base port set */
74 port_t port = CCR(base);
78 for (count=0; inb(port) && count<20000; ++count)
82 outb (port, cmd);
85 for (count=0; inb(port) && count<20000; ++count)
92 static int cx_reset (port_t port)
98 if (inb(GFRCR(port)) != 0)
101 cx_cmd (port, CCR_RSTALL);
106 if (inb(GFRCR(port)) != 0)
113 int cx_download (port_t port, const unsigned char *firmware, long bits,
120 inb (BDET(port));
129 outb (BCR2(port), cr2);
130 sr = inb (BSR(port));
131 outb (BCR0(port), BCR0800_TCK);
132 outb (BCR0(port), 0);
143 * Check if the Sigma-XXX board is present at the given base port.
145 static int cx_probe_chained_board (port_t port, int *c0, int *c1)
150 rev = inb (BSR(port));
180 if ((inb (BSR(port)+i) & BSR_REV_MASK) != (rev & BSR_REV_MASK))
186 * Check if the Sigma-800 board is present at the given base port.
190 static int cx_probe_800_chained_board (port_t port)
195 odet = inb (BDET(port));
200 det = inb (BDET(port));
207 outb (BCR0(port), 0);
208 outb (BCR1(port), 0);
209 outb (BCR2(port), 0);
214 * Check if the Sigma-2x board is present at the given base port.
216 static int cx_probe_2x_board (port_t port)
221 rev = inb (BSR(port));
227 if ((inb (BSR(port)+i) & BSR2X_REV_MASK) !=
234 * Check if the Cronyx-Sigma board is present at the given base port.
236 int cx_probe_board (port_t port, int irq, int dma)
240 if (! valid (port, porttab))
249 if (cx_probe_800_chained_board (port)) {
251 if (! (inb (BSR(port)) & BSR_NOCHAIN)) {
253 if (! cx_probe_800_chained_board (port+0x10))
256 if (! (inb (BSR(port+0x10)) & BSR_NOCHAIN))
262 if (cx_probe_chained_board (port, &c0, &c1)) {
264 if (! (inb (BSR(port)) & BSR_NOCHAIN)) {
266 if (! cx_probe_chained_board (port+0x10, &c2, &c3))
269 if (! (inb (BSR(port+0x10)) & BSR_NOCHAIN))
273 } else if (cx_probe_2x_board (port)) {
280 outb (BCR0(port), BCR0_NORESET);
282 outb (BCR0(port + 0x10), BCR0_NORESET);
285 if (c0 && ! cx_probe_chip (CS0(port)))
287 else if (c1 && ! cx_probe_chip (CS1A(port)) &&
288 ! cx_probe_chip (CS1(port)))
290 else if (c2 && ! cx_probe_chip (CS0(port + 0x10)))
292 else if (c3 && ! cx_probe_chip (CS1(port + 0x10)))
296 outb (BCR0(port), 0);
298 outb (BCR0(port + 0x10), 0);
305 * Check if the CD2400 chip is present at the given base port.
347 port_t port;
349 rev = inb (BSR(b->port));
350 port = ((rev & BSR_VAR_MASK) != CRONYX_400) ? CS0(b->port) : CS1(b->port);
358 outb (BCR0(b->port), BCR0_NORESET | irqmask[irq]);
359 outb (CAR(port), 0);
360 cx_cmd (port, CCR_CLRCH);
361 outb (CMR(port), CMR_HDLC);
362 outb (TCOR(port), 0);
363 outb (TBPR(port), 1);
364 cx_cmd (port, CCR_INITCH | CCR_ENTX);
365 outb (IER(port), IER_TXMPTY);
367 cx_reset (port);
374 outb (BCR0(b->port), 0);
378 static int cx_chip_revision (port_t port, int rev)
383 port = ((rev & BSR_VAR_MASK) != CRONYX_400) ? CS0(port) : CS1(port);
386 for (count=0; inb(GFRCR(port))==0; ++count)
390 return inb (GFRCR (port));
396 void cx_init (cx_board_t *b, int num, port_t port, int irq, int dma)
400 rev = inb (BSR(port));
402 if (cx_probe_800_chained_board (port)) {
403 cx_init_800 (b, num, port, irq, dma, chain);
408 cx_init_2x (b, num, port, irq, dma,
413 outb (BCR0(port), BCR0_NORESET);
415 outb (BCR0(port+0x10), BCR0_NORESET);
416 gfrcr = cx_chip_revision (port, rev);
420 rev2 = inb (BSR(port+0x10));
421 gfrcr = cx_chip_revision (port+0x10, rev2);
424 outb (BCR0(port+0x10), 0);
426 outb (BCR0(port), 0);
428 cx_init_board (b, num, port, irq, dma, chain,
436 void cx_init_board (cx_board_t *b, int num, port_t port, int irq, int dma,
444 b->port = port;
551 b->chan[i+0].port = CS0(port);
552 b->chan[i+4].port = cx_probe_chip (CS1A(port)) ?
553 CS1A(port) : CS1(port);
554 b->chan[i+8].port = CS0(port+0x10);
555 b->chan[i+12].port = CS1(port+0x10);
752 void cx_init_800 (cx_board_t *b, int num, port_t port, int irq, int dma,
759 b->port = port;
778 b->chan[i+0].port = CS0(port);
779 b->chan[i+4].port = cx_probe_chip (CS1A(port)) ?
780 CS1A(port) : CS1(port);
781 b->chan[i+8].port = CS0(port+0x10);
782 b->chan[i+12].port = CS1(port+0x10);
810 void cx_init_2x (cx_board_t *b, int num, port_t port, int irq, int dma,
817 b->port = port;
835 b->chan[i+0].port = CS0(port);
836 b->chan[i+4].port = CS1(port);
837 b->chan[i+8].port = CS0(port+0x10);
838 b->chan[i+12].port = CS1(port+0x10);
918 outb (BCR0(b->port), 0);
920 outb (BCR0(b->port+0x10), 0);
925 outb (BCR2(b->port), BCR2_TMS);
927 outb (BCR2(b->port+0x10), BCR2_TMS);
928 outb (BCR2(b->port), 0);
930 outb (BCR2(b->port+0x10), 0);
933 (! cx_download (b->port, firmware, bits, tst) ||
935 ! cx_download (b->port+0x10, firmware, bits, tst))))
943 outb (BCR0(b->port), b->bcr0);
945 outb (BCR0(b->port+0x10), b->bcr0b);
948 outw (BCR1(b->port), b->bcr1);
950 outw (BCR1(b->port+0x10), b->bcr1b);
953 outb (BCR2(b->port), b->opt.fast &
980 cx_reset (c->port);
986 outb (RPILR(c->port), BRD_INTR_LEVEL);
987 outb (TPILR(c->port), BRD_INTR_LEVEL);
988 outb (MPILR(c->port), BRD_INTR_LEVEL);
991 outb (BERCNT(c->port), 0);
994 outb (DMR(c->port), 0);
997 outb (TPR(c->port), 10);
1016 outb (BCR0(c->board->port), c->board->bcr0);
1025 outb (BCR0(c->board->port+0x10), c->board->bcr0b);
1030 outb (CAR(c->port), c->num & 3);
1035 outw (RTPR(c->port), 10); /* 10 msec, see TPR */
1038 outb (CMR(c->port), CMR_RXDMA | CMR_TXDMA | CMR_ASYNC);
1039 outb (COR1(c->port), BYTE c->aopt.cor1);
1040 outb (COR2(c->port), BYTE c->aopt.cor2);
1041 outb (COR3(c->port), BYTE c->aopt.cor3);
1042 outb (COR6(c->port), BYTE c->aopt.cor6);
1043 outb (COR7(c->port), BYTE c->aopt.cor7);
1044 outb (SCHR1(c->port), c->aopt.schr1);
1045 outb (SCHR2(c->port), c->aopt.schr2);
1046 outb (SCHR3(c->port), c->aopt.schr3);
1047 outb (SCHR4(c->port), c->aopt.schr4);
1048 outb (SCRL(c->port), c->aopt.scrl);
1049 outb (SCRH(c->port), c->aopt.scrh);
1050 outb (LNXT(c->port), c->aopt.lnxt);
1053 outb (CMR(c->port), CMR_RXDMA | CMR_TXDMA | CMR_HDLC);
1054 outb (COR1(c->port), BYTE c->hopt.cor1);
1055 outb (COR2(c->port), BYTE c->hopt.cor2);
1056 outb (COR3(c->port), BYTE c->hopt.cor3);
1057 outb (RFAR1(c->port), c->hopt.rfar1);
1058 outb (RFAR2(c->port), c->hopt.rfar2);
1059 outb (RFAR3(c->port), c->hopt.rfar3);
1060 outb (RFAR4(c->port), c->hopt.rfar4);
1061 outb (CPSR(c->port), c->hopt.cpsr);
1066 outb (COR4(c->port), BYTE c->opt.cor4);
1067 outb (COR5(c->port), BYTE c->opt.cor5);
1077 outb (RCOR(c->port), BYTE c->opt.rcor);
1078 outb (RBPR(c->port), period);
1091 outb (TCOR(c->port), BYTE c->opt.tcor);
1092 outb (TBPR(c->port), period);
1101 outb (CAR(c->port), c->num & 3);
1104 cx_cmd (c->port, CCR_CLRCH);
1107 outb (LIVR(c->port), c->board->num << 6 | c->num << 2);
1110 outb (MSVR_RTS(c->port), 0);
1111 outb (MSVR_DTR(c->port), c->mode==M_ASYNC ? 0 : MSV_TXCOUT);
1114 outw (ARBADRU(c->port), (unsigned short) (c->arphys>>16));
1115 outw (ARBADRL(c->port), (unsigned short) c->arphys);
1118 outw (BRBADRU(c->port), (unsigned short) (c->brphys>>16));
1119 outw (BRBADRL(c->port), (unsigned short) c->brphys);
1122 outw (ATBADRU(c->port), (unsigned short) (c->atphys>>16));
1123 outw (ATBADRL(c->port), (unsigned short) c->atphys);
1126 outw (BTBADRU(c->port), (unsigned short) (c->btphys>>16));
1127 outw (BTBADRL(c->port), (unsigned short) c->btphys);
1148 outw (BCR1(b->port), b->bcr1);
1155 outb (BCR1(b->port+0x10), b->bcr1b);
1159 outb (BCR1(b->port), b->bcr1);
1164 outb (CAR(c->port), c->num & 3);
1165 outb (MSVR_DTR(c->port), on ? MSV_DTR : 0);
1181 outw (BCR1(b->port), b->bcr1);
1190 outw (BCR1(b->port+0x10), b->bcr1b);
1202 outb (CAR(c->port), c->num & 3);
1203 outb (MSVR_RTS(c->port), on ? MSV_RTS : 0);
1216 outb (CAR(c->port), c->num & 3);
1217 return (inb (MSVR(c->port)) & MSV_DSR ? 1 : 0);
1231 sigval = inw (BSR(c->board->port)) >> 8;
1238 sigval = inw (BSR(c->board->port+0x10)) >> 8;
1254 outb (CAR(c->port), c->num & 3);
1255 return (inb (MSVR(c->port)) & MSV_CD ? 1 : 0);
1269 sigval = inw (BSR(c->board->port)) >> 8;
1276 sigval = inw (BSR(c->board->port+0x10)) >> 8;
1287 outb (CAR(c->port), c->num & 3);
1288 return (inb (MSVR(c->port)) & MSV_CTS ? 1 : 0);
1319 outb (BCR0(b->port), b->bcr0);