Lines Matching refs:stat
439 cvmx_spxx_clk_stat_t stat;
452 stat.u64 = cvmx_read_csr(CVMX_SPXX_CLK_STAT(interface));
453 if (stat.s.s4clk0 && stat.s.s4clk1 && clock_transitions)
458 cvmx_write_csr(CVMX_SPXX_CLK_STAT(interface), stat.u64);
459 stat.s.s4clk0 = 0;
460 stat.s.s4clk1 = 0;
467 } while (stat.s.s4clk0 == 0 || stat.s.s4clk1 == 0);
476 stat.u64 = cvmx_read_csr (CVMX_SPXX_CLK_STAT(interface));
477 if (stat.s.d4clk0 && stat.s.d4clk1 && clock_transitions)
482 cvmx_write_csr(CVMX_SPXX_CLK_STAT(interface), stat.u64);
483 stat.s.d4clk0 = 0;
484 stat.s.d4clk1 = 0;
491 } while (stat.s.d4clk0 == 0 || stat.s.d4clk1 == 0);
511 cvmx_spxx_clk_stat_t stat;
548 stat.u64 = cvmx_read_csr (CVMX_SPXX_CLK_STAT(interface));
549 if (stat.s.srxtrn && rx_training_needed)
552 cvmx_write_csr(CVMX_SPXX_CLK_STAT(interface), stat.u64);
553 stat.s.srxtrn = 0;
560 } while (stat.s.srxtrn == 0);
594 cvmx_spxx_clk_stat_t stat;
606 stat.u64 = cvmx_read_csr (CVMX_SPXX_CLK_STAT (interface));
612 } while (stat.s.stxcal == 0);