contrib/octeon-sdk/cvmx-pcie.c

181         cvmx_pciercx_cfg030_t pciercx_cfg030;
182         pciercx_cfg030.u32 = cvmx_pcie_cfgx_read(pcie_port, CVMX_PCIERCX_CFG030(pcie_port));
185             pciercx_cfg030.s.mps = MPS_CN5XXX;
186             pciercx_cfg030.s.mrrs = MRRS_CN5XXX;
190             pciercx_cfg030.s.mps = MPS_CN6XXX;
191             pciercx_cfg030.s.mrrs = MRRS_CN6XXX;
193         pciercx_cfg030.s.ro_en = 1; /* Enable relaxed order processing. This will allow devices to affect read response ordering */
194         pciercx_cfg030.s.ns_en = 1; /* Enable no snoop processing. Not used by Octeon */
195         pciercx_cfg030.s.ce_en = 1; /* Correctable error reporting enable. */
196         pciercx_cfg030.s.nfe_en = 1; /* Non-fatal error reporting enable. */
197         pciercx_cfg030.s.fe_en = 1; /* Fatal error reporting enable. */
198         pciercx_cfg030.s.ur_en = 1; /* Unsupported request reporting enable. */
199         cvmx_pcie_cfgx_write(pcie_port, CVMX_PCIERCX_CFG030(pcie_port), pciercx_cfg030.u32);