ath_hal/ar9300/ar9300_eeprom.c

958     u_int8_t *target_power_val_t2)
968     target_power_val_t2[ALL_TARGET_LEGACY_6_24] =
971     target_power_val_t2[ALL_TARGET_LEGACY_36] =
974     target_power_val_t2[ALL_TARGET_LEGACY_48] =
977     target_power_val_t2[ALL_TARGET_LEGACY_54] =
980     target_power_val_t2[ALL_TARGET_LEGACY_1L_5L] =
983     target_power_val_t2[ALL_TARGET_LEGACY_5S] =
986     target_power_val_t2[ALL_TARGET_LEGACY_11L] =
989     target_power_val_t2[ALL_TARGET_LEGACY_11S] =
992     target_power_val_t2[ALL_TARGET_HT20_0_8_16] =
995     target_power_val_t2[ALL_TARGET_HT20_1_3_9_11_17_19] =
998     target_power_val_t2[ALL_TARGET_HT20_4] =
1001     target_power_val_t2[ALL_TARGET_HT20_5] =
1004     target_power_val_t2[ALL_TARGET_HT20_6] =
1007     target_power_val_t2[ALL_TARGET_HT20_7] =
1010     target_power_val_t2[ALL_TARGET_HT20_12] =
1013     target_power_val_t2[ALL_TARGET_HT20_13] =
1016     target_power_val_t2[ALL_TARGET_HT20_14] =
1019     target_power_val_t2[ALL_TARGET_HT20_15] =
1022     target_power_val_t2[ALL_TARGET_HT20_20] =
1025     target_power_val_t2[ALL_TARGET_HT20_21] =
1028     target_power_val_t2[ALL_TARGET_HT20_22] =
1031     target_power_val_t2[ALL_TARGET_HT20_23] =
1034     target_power_val_t2[ALL_TARGET_HT40_0_8_16] =
1038     target_power_val_t2[ALL_TARGET_HT40_1_3_9_11_17_19] =
1042     target_power_val_t2[ALL_TARGET_HT40_4] =
1045     target_power_val_t2[ALL_TARGET_HT40_5] =
1048     target_power_val_t2[ALL_TARGET_HT40_6] =
1051     target_power_val_t2[ALL_TARGET_HT40_7] =
1054     target_power_val_t2[ALL_TARGET_HT40_12] =
1057     target_power_val_t2[ALL_TARGET_HT40_13] =
1060     target_power_val_t2[ALL_TARGET_HT40_14] =
1063     target_power_val_t2[ALL_TARGET_HT40_15] =
1066     target_power_val_t2[ALL_TARGET_HT40_20] =
1069     target_power_val_t2[ALL_TARGET_HT40_21] =
1072     target_power_val_t2[ALL_TARGET_HT40_22] =
1075     target_power_val_t2[ALL_TARGET_HT40_23] =
1086                      __func__, i, target_power_val_t2[i]);
1092                      __func__, i, target_power_val_t2[i]);
1098                      __func__, i, target_power_val_t2[i]);
1104                      __func__, i, target_power_val_t2[i]);
2662     u_int8_t target_power_val_t2[ar9300_rate_size];
2734     ar9300_set_target_power_from_eeprom(ah, ichan->channel, target_power_val_t2);
2774                     target_power_val_t2[ptr_mcs_rate2power_table_index[i]] -=
2778                         "Scale down target_power_val_t2[%d] = 0x%04x\n",
2780                         ichan->channel, i, target_power_val_t2[i]);
2790     OS_MEMCPY(target_power_val_t2_eep, target_power_val_t2,
2791                                    sizeof(target_power_val_t2));
2793                                      target_power_val_t2, cfg_ctl,
2810         ar9300_adjust_reg_txpower_cdd(ah, target_power_val_t2);
2823                 if (ABS(target_power_val_t2_eep[i], target_power_val_t2[i]) >
2831                         target_power_val_t2[i], tmp_paprd_rate_mask);
2845     ar9300_transmit_power_reg_write(ah, target_power_val_t2);
2848     ar9300_selfgen_tpc_reg_write(ah, chan, target_power_val_t2);
2857                 target_power_val_t2,
2858                 sizeof(target_power_val_t2));
2875      * AR9300_Rates enum to select an entry from target_power_val_t2[]
2886     max_power_level = target_power_val_t2[i];
2934             OS_MEMCPY(target_power_val_t2, target_power_val_t2_eep,
2937                                      target_power_val_t2, cfg_ctl,
2945             ar9300_init_rate_txpower(ah, mode, chan, target_power_val_t2,