Lines Matching refs:t2
82 sll t2, v1, 32 - 20 # get x fraction
83 srl t2, t2, 32 - 20
85 bne t2, zero, 1f
89 * Find out how many leading zero bits are in t2,t3 and put in t9.
91 move v0, t2
93 bne t2, zero, 1f
121 * Now shift t2,t3 the correct number of bits.
131 sll t2, t3, t9
136 sll t2, t2, t9
138 or t2, t2, ta0
143 sll t2, t2, 32 - 20 # clear implied one bit
144 srl t2, t2, 32 - 20
149 or t0, t0, t2
156 sll t2, v1, 31 - 20 # clear exponent, extract fraction
157 or t2, t2, v0 # set implied one bit
159 srl t2, t2, 31 - 20 # shift fraction back to normal position
161 sll ta0, t2, t1 # shift right t2,t3 based on exponent
166 srl t2, t2, t1
171 addu t2, t2, ta0
176 mtc1 t2, $f1 # save denormalized result (MSW)
184 sll t8, t2, t1 # save bits shifted out
186 srl t3, t2, t1