Target/ARM/Thumb2SizeReduction.cpp

53                            // 2 - Always set CPSR.
184     // Last instruction to define CPSR in the current block.
186     // Was CPSR last defined by a high latency instruction?
187     // When CPSRDef is null, this refers to CPSR defs in predecessors.
215     if (*Regs == ARM::CPSR)
231 /// the 's' 16-bit instruction partially update CPSR. Abort the
232 /// transformation to avoid adding false dependency on last CPSR setting
236 /// last instruction that defines the CPSR and the current instruction. If there
238 /// before the CPSR setting instruction anyway.
264     if (Reg == 0 || Reg == ARM::CPSR)
278   // If the current CPSR has high latency, try to avoid the false dependency.
283   // of them, so always shrink them when CPSR doesn't have high latency.
299       // Not predicated, must set CPSR.
301         // Original instruction was not setting CPSR, but CPSR is not
302         // currently live anyway. It's ok to set it. The CPSR def is
312       // Predicated, must not set CPSR.
318     /// Old opcode has an optional def of CPSR.
321     // If old opcode does not implicitly define CPSR, then it's not ok since
322     // these new opcodes' CPSR def is not meant to be thrown away. e.g. CMP.
327     // 16-bit instruction does not set CPSR.
347     if (Reg == 0 || Reg == ARM::CPSR)
553         MI->getOperand(MCID.getNumOperands()-1).getReg() == ARM::CPSR)
703     HasCC = (MI->getOperand(NumOps-1).getReg() == ARM::CPSR);
771       if (!Reg || Reg == ARM::CPSR)
799     HasCC = (MI->getOperand(NumOps-1).getReg() == ARM::CPSR);
840     if (MO.isReg() && MO.isImplicit() && MO.getReg() == ARM::CPSR)
841       // Skip implicit def of CPSR. Either it's modeled as an optional
865     if (MO.getReg() != ARM::CPSR)
881     if (MO.getReg() != ARM::CPSR)
883     assert(LiveCPSR && "CPSR liveness tracking is wrong!");
921   // Yes, CPSR could be livein.
922   bool LiveCPSR = MBB.isLiveIn(ARM::CPSR);
974       // FIXME: Since post-ra scheduler operates on bundles, the CPSR kill
978       if (BundleMI->killsRegister(ARM::CPSR))
980       MachineOperand *MO = BundleMI->findRegisterDefOperand(ARM::CPSR);
988       // Calls don't really set CPSR.
993       // This is the last CPSR defining instruction.