Lines Matching refs:N1

1345 // commuteShuffle - swaps the values of N1 and N2, and swaps all indices in
1346 // the shuffle mask M that point at N1 to point at N2, and indices that point
1347 // N2 to point at N1.
1348 static void commuteShuffle(SDValue &N1, SDValue &N2, SmallVectorImpl<int> &M) {
1349 std::swap(N1, N2);
1359 SDValue SelectionDAG::getVectorShuffle(EVT VT, SDLoc dl, SDValue N1,
1361 assert(VT == N1.getValueType() && VT == N2.getValueType() &&
1365 if (N1.getOpcode() == ISD::UNDEF && N2.getOpcode() == ISD::UNDEF)
1378 if (N1 == N2) {
1385 if (N1.getOpcode() == ISD::UNDEF)
1386 commuteShuffle(N1, N2, MaskVec);
1407 N1 = getUNDEF(VT);
1408 commuteShuffle(N1, N2, MaskVec);
1417 return N1;
1420 SDValue Ops[2] = { N1, N2 };
1437 dl.getDebugLoc(), N1, N2,
1633 SDValue SelectionDAG::FoldSetCC(EVT VT, SDValue N1,
1658 assert(!N1.getValueType().isInteger() && "Illegal setcc for integer!");
1664 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode())) {
1682 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.getNode())) {
1729 MVT CompVT = N1.getValueType().getSimpleVT();
1733 return getSetCC(dl, VT, N2, N1, SwappedCond);
2886 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, EVT VT, SDValue N1,
2888 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
2893 assert(VT == MVT::Other && N1.getValueType() == MVT::Other &&
2896 if (N1.getOpcode() == ISD::EntryToken) return N2;
2897 if (N2.getOpcode() == ISD::EntryToken) return N1;
2898 if (N1 == N2) return N1;
2902 if (N1.getOpcode() == ISD::UNDEF &&
2908 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
2910 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(),
2911 N1.getNode()->op_end());
2918 assert(N1.getValueType() == N2.getValueType() &&
2919 N1.getValueType() == VT && "Binary operator types must match!");
2925 return N1;
2932 assert(N1.getValueType() == N2.getValueType() &&
2933 N1.getValueType() == VT && "Binary operator types must match!");
2937 return N1;
2947 assert(N1.getValueType() == N2.getValueType() &&
2948 N1.getValueType() == VT && "Binary operator types must match!");
2958 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1))
2964 return N1;
2969 return N1;
2971 ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1);
2977 V = N1;
2991 assert(N1.getValueType() == N2.getValueType() &&
2992 N1.getValueType() == VT && "Binary operator types must match!");
2994 case ISD::FCOPYSIGN: // N1 and result must match. N1/N2 need not match.
2995 assert(N1.getValueType() == VT &&
2996 N1.getValueType().isFloatingPoint() &&
3005 assert(VT == N1.getValueType() &&
3016 Log2_32_Ceil(N1.getValueType().getSizeInBits()) &&
3023 return N1;
3025 return N1;
3029 assert(VT == N1.getValueType() && "Not an inreg round!");
3040 if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding.
3045 N1.getValueType().isFloatingPoint() &&
3046 VT.bitsLE(N1.getValueType()) &&
3048 if (N1.getValueType() == VT) return N1; // noop conversion.
3053 assert(VT == N1.getValueType() && "Not an inreg extend!");
3060 if (VT == EVT) return N1; // noop assertion.
3065 assert(VT == N1.getValueType() && "Not an inreg extend!");
3075 if (EVT == VT) return N1; // Not actually extending
3088 if (N1.getOpcode() == ISD::UNDEF)
3094 N1.getOpcode() == ISD::CONCAT_VECTORS &&
3095 N1.getNumOperands() > 0) {
3097 N1.getOperand(0).getValueType().getVectorNumElements();
3099 N1.getOperand(N2C->getZExtValue() / Factor),
3106 if (N2C && N1.getOpcode() == ISD::BUILD_VECTOR) {
3107 SDValue Elt = N1.getOperand(N2C->getZExtValue());
3120 if (N1.getOpcode() == ISD::INSERT_VECTOR_ELT) {
3124 SDValue N1Op2 = N1.getOperand(2);
3129 if (VT == N1.getOperand(1).getValueType())
3130 return N1.getOperand(1);
3132 return getSExtOrTrunc(N1.getOperand(1), DL, VT);
3135 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, N1.getOperand(0), N2);
3141 assert(!N1.getValueType().isVector() && !VT.isVector() &&
3142 (N1.getValueType().isInteger() == VT.isInteger()) &&
3143 N1.getValueType() != VT &&
3149 if (N1.getOpcode() == ISD::BUILD_PAIR)
3150 return N1.getOperand(N2C->getZExtValue());
3153 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N1)) {
3162 if (VT.isSimple() && N1.getValueType().isSimple()) {
3163 assert(VT.isVector() && N1.getValueType().isVector() &&
3166 N1.getValueType().getVectorElementType() &&
3168 assert(VT.getSimpleVT() <= N1.getSimpleValueType() &&
3174 <= N1.getValueType().getVectorNumElements())
3179 if (VT.getSimpleVT() == N1.getSimpleValueType())
3180 return N1;
3187 SDValue SV = FoldConstantArithmetic(Opcode, VT, N1.getNode(), N2.getNode());
3193 std::swap(N1, N2);
3197 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.getNode());
3203 std::swap(N1, N2);
3252 if (N1.getOpcode() == ISD::UNDEF) {
3254 std::swap(N1, N2);
3264 return N1; // fold op(undef, arg2) -> undef
3284 if (N1.getOpcode() == ISD::UNDEF)
3314 return N1;
3320 return N1;
3322 return N1;
3330 SDValue Ops[] = { N1, N2 };
3338 DL.getDebugLoc(), VTs, N1, N2);
3342 DL.getDebugLoc(), VTs, N1, N2);
3353 SDValue N1, SDValue N2, SDValue N3) {
3355 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
3358 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1);
3375 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
3378 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(),
3379 N1.getNode()->op_end());
3387 SDValue Simp = FoldSetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get(), DL);
3404 if (VT.isSimple() && N1.getValueType().isSimple()
3406 assert(VT.isVector() && N1.getValueType().isVector() &&
3409 assert(VT == N1.getValueType() &&
3411 assert(N2.getSimpleValueType() <= N1.getSimpleValueType() &&
3428 if (N1.getValueType() == VT)
3429 return N1;
3437 SDValue Ops[] = { N1, N2, N3 };
3445 DL.getDebugLoc(), VTs, N1, N2, N3);
3449 DL.getDebugLoc(), VTs, N1, N2, N3);
3460 SDValue N1, SDValue N2, SDValue N3,
3462 SDValue Ops[] = { N1, N2, N3, N4 };
3467 SDValue N1, SDValue N2, SDValue N3,
3469 SDValue Ops[] = { N1, N2, N3, N4, N5 };
4887 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0));
4894 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0));
4954 SDValue N1) {
4955 SDValue Ops[] = { N1 };
4960 SDValue N1, SDValue N2) {
4961 SDValue Ops[] = { N1, N2 };
4966 SDValue N1, SDValue N2, SDValue N3) {
4967 SDValue Ops[] = { N1, N2, N3 };
4972 SDValue N1, SDValue N2, SDValue N3,
4974 SDValue Ops[] = { N1, N2, N3, N4 };
4979 SDValue N1, SDValue N2, SDValue N3,
4981 SDValue Ops[] = { N1, N2, N3, N4, N5 };