Lines Matching refs:reg_rtx

1835       if (chain->rld[i].reg_rtx)
1837 int regno = REGNO (chain->rld[i].reg_rtx);
1840 = hard_regno_nregs[regno][GET_MODE (chain->rld[i].reg_rtx)];
4083 REGNO (rld[i].reg_rtx))
4086 && ((unsigned) reg_reloaded_contents[REGNO (rld[i].reg_rtx)]
4090 rtx reload_reg = rld[i].reg_rtx;
4153 REGNO (rld[i].reg_rtx))
4156 && ((unsigned) reg_reloaded_contents[REGNO (rld[i].reg_rtx)]
4160 REGNO (rld[i].reg_rtx));
4490 && rld[i].reg_rtx)
4492 unsigned int conflict_start = true_regnum (rld[i].reg_rtx);
4992 rtx reg = rld[i].reg_rtx;
5211 rld[r].reg_rtx = 0;
5257 rld[r].reg_rtx = reg;
5269 Set rld[R].reg_rtx to the register allocated.
5395 is the array we use to restore the reg_rtx field for every reload. */
5403 rld[i].reg_rtx = save_reload_reg_rtx[i];
5444 if (rld[i].reg_rtx)
5445 mark_reload_reg_in_use (REGNO (rld[i].reg_rtx), rld[i].opnum,
5479 if (rld[j].reg_rtx != NULL_RTX)
5481 gcc_assert (REG_P (rld[j].reg_rtx)
5482 && HARD_REGISTER_P (rld[j].reg_rtx));
5483 reload_spill_index[j] = REGNO (rld[j].reg_rtx);
5495 save_reload_reg_rtx[j] = rld[j].reg_rtx;
5544 if (rld[r].in != 0 && rld[r].reg_rtx != 0
5545 && (rtx_equal_p (rld[r].in, rld[r].reg_rtx)
5546 || (rtx_equal_p (rld[r].out, rld[r].reg_rtx)
5563 && rld[reload_order[i]].reg_rtx == 0)
5737 || (rld[r].out && rld[r].reg_rtx
5738 && rtx_equal_p (rld[r].out, rld[r].reg_rtx)))
5757 rld[r].reg_rtx = last_reg;
5924 rld[r].reg_rtx = equiv;
5952 if (rld[r].reg_rtx != 0 || rld[r].optional != 0)
6003 if (rld[r].reg_rtx != 0 || rld[r].optional)
6032 if (chain->rld[i].regno < 0 || chain->rld[i].reg_rtx != 0)
6056 if (reload_inherited[r] && rld[r].reg_rtx)
6057 check_reg = rld[r].reg_rtx;
6104 if (rld[j].reg_rtx != 0
6109 int regno = true_regnum (rld[j].reg_rtx);
6114 rld[j].reg_rtx = 0;
6126 If rld[r].reg_rtx is 0, this is an optional reload
6129 && rld[r].reg_rtx != 0)
6163 if (! rld[r].reg_rtx)
6165 regno = true_regnum (rld[r].reg_rtx);
6166 rld[r].reg_rtx = 0;
6203 || rld[i].out != 0 || rld[i].reg_rtx == 0
6204 || reg_set_p (rld[i].reg_rtx, insn))
6215 if (i == j || rld[j].reg_rtx == 0
6216 || ! reg_overlap_mentioned_p (rld[j].reg_rtx,
6217 rld[i].reg_rtx))
6229 if (! rtx_equal_p (rld[i].reg_rtx, rld[j].reg_rtx)
6253 if (i != j && rld[j].reg_rtx != 0
6254 && rtx_equal_p (rld[i].reg_rtx, rld[j].reg_rtx)
6307 if (rld[j].reg_rtx)
6309 gcc_assert (rld[k].in == 0 || rld[k].reg_rtx == 0
6311 || !rtx_equal_p (rld[k].reg_rtx,
6312 rld[j].reg_rtx)
6395 rtx reloadreg = rl->reg_rtx;
6599 reg_renumber[REGNO (old)] = REGNO (rl->reg_rtx);
6680 second_reload_reg = rld[secondary_reload].reg_rtx;
6685 third_reload_reg = rld[tertiary_reload].reg_rtx;
6858 rtx reloadreg = rl->reg_rtx;
6905 reloadreg = rld[secondary_reload].reg_rtx;
6935 rtx third_reloadreg = rld[tertiary_reload].reg_rtx;
6969 rtx third_reloadreg = rld[tertiary_reload].reg_rtx;
7010 if (reg_mentioned_p (rl->reg_rtx, pat))
7015 && SET_SRC (set) == rl->reg_rtx)
7024 if (REGNO (rl->reg_rtx) < FIRST_PSEUDO_REGISTER)
7037 && SET_SRC (set) == rl->reg_rtx
7038 && SET_DEST (set) == rld[s].reg_rtx)
7044 rtx s_reg = rld[s].reg_rtx;
7058 new_spill_reg_store[REGNO (rl->reg_rtx)] = p;
7090 && ! rtx_equal_p (rl->reg_rtx, old)
7091 && rl->reg_rtx != 0)
7114 && rl->reg_rtx
7115 && REG_P (rl->reg_rtx)
7116 && spill_reg_store[REGNO (rl->reg_rtx)] != 0
7121 && (REGNO (spill_reg_stored_to[REGNO (rl->reg_rtx)])
7128 spill_reg_stored_to[REGNO (rl->reg_rtx)])
7129 || rtx_equal_p (spill_reg_stored_to[REGNO (rl->reg_rtx)],
7131 delete_output_reload (insn, j, REGNO (rl->reg_rtx));
7170 || rl->reg_rtx == old
7171 || rl->reg_rtx == 0)
7180 XEXP (note, 0) = rl->reg_rtx;
7190 rl->reg_rtx);
7215 GET_MODE (rld[r].reg_rtx),
7218 GET_MODE (rld[r].reg_rtx),
7261 if (rld[j].reg_rtx
7262 && REGNO (rld[j].reg_rtx) < FIRST_PSEUDO_REGISTER)
7263 new_spill_reg_store[REGNO (rld[j].reg_rtx)] = 0;
7355 If rld[r].reg_rtx is 0, this is an optional reload
7358 if (i >= 0 && rld[r].reg_rtx != 0)
7360 int nr = hard_regno_nregs[i][GET_MODE (rld[r].reg_rtx)];
7405 [GET_MODE (rld[r].reg_rtx)]);
7410 reg_last_reload_reg[nregno] = rld[r].reg_rtx;
7426 ? regno_reg_rtx[REGNO (rld[r].reg_rtx) + k]
7456 && ! reg_set_p (rld[r].reg_rtx, PATTERN (insn)))
7474 [GET_MODE (rld[r].reg_rtx)]);
7476 reg_last_reload_reg[nregno] = rld[r].reg_rtx;
7486 ? regno_reg_rtx[REGNO (rld[r].reg_rtx) + k]
7554 src_reg = rld[r].reg_rtx;
7571 src_reg = rld[k].reg_rtx;
8069 reg_renumber[REGNO (reg)] = REGNO (rld[j].reg_rtx);
8188 if ((rld[j].reg_rtx == dst && reload_inherited[j])
8192 if (rld[j].in && rld[j].reg_rtx == dst)
8207 if ((rld[j].reg_rtx == dst && reload_inherited[j])