config/rs6000/rs6000.c

1064   /* The GPRs can hold any mode, but values bigger than one register
1090   /* ...but GPRs can hold SIMD data on the SPE in one register.  */
2183    depends on STEP and COPIES, one of which will be 1.  If COPIES > 1,
2185    vsplt's operand; if STEP > 1, one in STEP elements is set to the vsplt's
2468   /* Construct the vector in memory one field at a time
2600   /* Note that when we only have two 0->1 and 1->0 transitions, one of the
2601      masks will be all 1's.  We are guaranteed more than one transition.  */
2964    to be legitimate.  If we find one, return the new, valid address.
2965    This is used from only one place: `memory_address' in explow.c.
2981    possibility of bit 16 being a one.
3205 	 not one to secondary TOC sections used by 64-bit -mminimal-toc,
4251 	     this is a symbol plus a constant we can add in one insn,
5157   /* Optimize the simple case where the arg fits in one gpr, except in
5210    so we can pass the FP value just in one register.  emit_library_function
5381 	      /* Currently, we only ever need one reg here because complex
5472    PARALLEL, perhaps using more than one register type, this function
5846   /* The correct type is an array type of one element.  */
7827      _lower_.  We use one compare, but look in different bits of the
7943    SUBTARGET may be used as the target for computing one of EXP's operands.
9383      memset is about 4 instructions, so allow for one instruction to
9632      is assigned to one of the output registers.  */
9748    significant 0's, then one or more 1's, then zero or more 0's.  */
9764       /* Find the least significant one bit.  */
9854       /* Find the least significant one bit.  */
10410       /* Add one for shift count in rlinm for scc.  */
10485       /* Similar, but add one for shift count in rlinm for scc and pass
10613 	 expression.  The expression may have one or both operands
10614 	 negated (if one, only the first one).  For condition register
11202        ordering compare that can be shared with this one.
11996      can't be generated if we care about that.  It's safe if one side
12642    multi-register moves.  It will emit at most one instruction for
13106      so we opt to save the GPRs in 64-bits always if but one register
14540   /* Do any required saving of fpr's.  If only one or two to save, do
15465      it looks like we might want one, insert a NOP.  */
15630 		      /* If only one bit will fit, don't or in this entry.  */
15671       /* Only emit this long if there was at least one parameter.  */
15722    contains a pointer, and is the one used to pass the `this' pointer
16206 	 entirely within `low' and can be stored in one TOC entry.  */
16348 	  /* Write two quotes to get one.  */
16383   /* Now close the string if we have written one.  Then end the line.  */
16835      where one integer unit can do multiply and divides and the other
17177    one of the following schemes, depending on the value of the flag
17314    each insn.  A subsequent insn will start a new group if one of the following
18748    We want to go into the TOC section so at least one .toc will be emitted.
18749    Also, in order to output proper .bs/.es pairs, we need at least one static
19115 	 NEG or PLUS already counted so only add one.  */
19161    CLASS1 to one of CLASS2.  */
19184 	/* A move will cost one instruction per GPR moved.  */
19188   /* Moving between two similar registers is just one instruction.  */
19221   rtx x0, e0, e1, y1, u0, v0, one;
19229   one = force_reg (SFmode, CONST_DOUBLE_FROM_REAL_VALUE (dconst1, SFmode));
19237 			  gen_rtx_MINUS (SFmode, one,
19266   rtx x0, e0, e1, e2, y1, y2, y3, u0, v0, one;
19277   one = force_reg (DFmode, CONST_DOUBLE_FROM_REAL_VALUE (dconst1, DFmode));
19285 			  gen_rtx_MINUS (DFmode, one,