Lines Matching refs:intrs
229 dmd = &unit->intrs[idx];
276 dmd = &unit->intrs[idx];
344 dmd = &unit->intrs[i];
425 unit->intrs[i].irq = -1;
427 unit->intrs[DMAR_INTR_FAULT].name = "fault";
428 unit->intrs[DMAR_INTR_FAULT].irq_rid = DMAR_FAULT_IRQ_RID;
429 unit->intrs[DMAR_INTR_FAULT].handler = dmar_fault_intr;
430 unit->intrs[DMAR_INTR_FAULT].msi_data_reg = DMAR_FEDATA_REG;
431 unit->intrs[DMAR_INTR_FAULT].msi_addr_reg = DMAR_FEADDR_REG;
432 unit->intrs[DMAR_INTR_FAULT].msi_uaddr_reg = DMAR_FEUADDR_REG;
433 unit->intrs[DMAR_INTR_FAULT].enable_intr = dmar_enable_fault_intr;
434 unit->intrs[DMAR_INTR_FAULT].disable_intr = dmar_disable_fault_intr;
441 unit->intrs[DMAR_INTR_QI].name = "qi";
442 unit->intrs[DMAR_INTR_QI].irq_rid = DMAR_QI_IRQ_RID;
443 unit->intrs[DMAR_INTR_QI].handler = dmar_qi_intr;
444 unit->intrs[DMAR_INTR_QI].msi_data_reg = DMAR_IEDATA_REG;
445 unit->intrs[DMAR_INTR_QI].msi_addr_reg = DMAR_IEADDR_REG;
446 unit->intrs[DMAR_INTR_QI].msi_uaddr_reg = DMAR_IEUADDR_REG;
447 unit->intrs[DMAR_INTR_QI].enable_intr = dmar_enable_qi_intr;
448 unit->intrs[DMAR_INTR_QI].disable_intr = dmar_disable_qi_intr;