Lines Matching refs:MV88E61XX_WRITE_PORT
102 #define MV88E61XX_WRITE_PORT(psc, reg, val) \
242 MV88E61XX_WRITE_PORT(psc, MV88E61XX_PORT_CONTROL, val);
298 MV88E61XX_WRITE_PORT(psc, MV88E61XX_PORT_CONTROL, val);
313 MV88E61XX_WRITE_PORT(psc, MV88E61XX_PORT_FORCE_MAC, 0x0003);
316 MV88E61XX_WRITE_PORT(psc, MV88E61XX_PORT_FORCE_MAC, 0x003e);
320 MV88E61XX_WRITE_PORT(psc, MV88E61XX_PORT_PAUSE_CONTROL, 0x0000);
324 MV88E61XX_WRITE_PORT(psc, MV88E61XX_PORT_CONTROL, 0x04bc);
330 MV88E61XX_WRITE_PORT(psc, MV88E61XX_PORT_CONTROL, 0x063f);
335 MV88E61XX_WRITE_PORT(psc, MV88E61XX_PORT_CONTROL2, 0x0000);
338 MV88E61XX_WRITE_PORT(psc, MV88E61XX_PORT_CONTROL2, 0x8000);
354 MV88E61XX_WRITE_PORT(psc, MV88E61XX_PORT_VLAN_MAP,
358 MV88E61XX_WRITE_PORT(psc, MV88E61XX_PORT_VLAN,
363 MV88E61XX_WRITE_PORT(psc, MV88E61XX_PORT_PROVIDER_PROTO,
367 MV88E61XX_WRITE_PORT(psc, MV88E61XX_PORT_ETHER_PROTO,
371 MV88E61XX_WRITE_PORT(psc, MV88E61XX_PORT_FILTER,
377 MV88E61XX_WRITE_PORT(psc, MV88E61XX_PORT_FILTER,