dev/wl/if_wl.c

409 #define PCMD(base, hacr) outw((base), (hacr))
421     outw(PIOR1(base), 0);			/* go to beginning of RAM */
424     outw(PIOR1(base), 0);			/* rewind */
543     outw(PIOR1(base), OFFSET_SCB + 8);	/* address of scb_crcerrs */
544     outw(PIOP1(base), 0);			/* clear scb_crcerrs */
545     outw(PIOP1(base), 0);			/* clear scb_alnerrs */
546     outw(PIOP1(base), 0);			/* clear scb_rscerrs */
547     outw(PIOP1(base), 0);			/* clear scb_ovrnerrs */
664     outw(PIOR1(base), OFFSET_SCB);
670     outw(PIOR1(base), OFFSET_CU);
676     outw(PIOR1(base), OFFSET_TBD);
895     outw(PIOR1(base), OFFSET_SCP);
903     outw(PIOR1(base), OFFSET_ISCP);
914     outw(PIOR1(base), OFFSET_SCB);
919     outw(PIOR0(base), OFFSET_ISCP + 0);	/* address of iscp_busy */
924     outw(PIOR0(base), OFFSET_SCB + 0);	/* address of scb_status */
936     outw(PIOR1(base), OFFSET_CU);
943     outw(PIOR1(base), OFFSET_TBD);
970     outw(PIOR1(base), OFFSET_CU);
972     outw(PIOR0(base),OFFSET_SCB + 0);	/* scb_status */
974     outw(PIOR0(base), OFFSET_SCB + 2);
1079     outw(PIOR1(base), fd_p);
1090     outw(PIOR1(base), fd.rbd_offset);
1129 	outw(PIOR1(base), rbd.buffer_addr);
1152 	    outw(PIOR1(base), rbd.next_rbd_offset);
1529 	outw(PIOR0(base), OFFSET_SCB + 0);	/* get scb status */
1573 	    outw(PIOR1(base), OFFSET_CU);	/* get command status */
1657 	outw(PIOR0(base), fd_p + 0);	/* address of status */
1659 	outw(PIOR1(base), fd_p + 4);	/* address of link_offset */
1711     outw(PIOR0(base), fd_p + 6);
1716 	    outw(PIOR0(base), l_rbdp + 0);	/* address of status */
1719 	    outw(PIOP0(base), 0);
1720 	    outw(PIOR0(base), l_rbdp + 2);	/* next_rbd_offset */
1724 	outw(PIOP0(base), 0);
1725 	outw(PIOR0(base), l_rbdp + 2);		/* next_rbd_offset */
1726 	outw(PIOP0(base), I82586NULL);
1727 	outw(PIOR0(base), l_rbdp + 8);		/* address of size */
1728 	outw(PIOP0(base), inw(PIOP0(base)) | AC_CW_EL);
1729 	outw(PIOR0(base), sc->end_rbd + 2);
1730 	outw(PIOP0(base), f_rbdp);		/* end_rbd->next_rbd_offset */
1731 	outw(PIOR0(base), sc->end_rbd + 8);	/* size */
1732 	outw(PIOP0(base), inw(PIOP0(base)) & ~AC_CW_EL);
1740     outw(PIOR1(base), fd_p);
1743     outw(PIOR1(base), sc->end_fd + 2);	/* addr of command */
1744     outw(PIOP1(base), 0);		/* command = 0 */
1745     outw(PIOP1(base), fd_p);		/* end_fd->link_offset = fd_p */
1789     outw(PIOR1(base), OFFSET_CU);
1791     outw(PIOP1(base), OFFSET_TBD);	/* cb.cmd.transmit.tbd_offset */
1793     outw(PIOP1(base), eh_p->ether_type);
1803     outw(PIOR0(base), OFFSET_TBD);
1804     outw(PIOP0(base), 0);		/* act_count */
1805     outw(PIOR1(base), OFFSET_TBD + 4);
1806     outw(PIOP1(base), xmtdata_p);	/* buffer_addr */
1807     outw(PIOP1(base), 0);		/* buffer_base */
1816 	    outw(PIOR1(base), xmtdata_p);
1819 	    outw(PIOR0(base), tbd_p);  /* address of act_count */
1820 	    outw(PIOP0(base), inw(PIOP0(base)) + count);
1826 		outw(PIOR0(base), tbd_p + 2);
1828 		outw(PIOP0(base), tbd_p); /* next_tbd_offset */
1829 		outw(PIOR0(base), tbd_p);
1830 		outw(PIOP0(base), 0);	/* act_count */
1831 		outw(PIOR1(base), tbd_p + 4);
1832 		outw(PIOP1(base), xmtdata_p); /* buffer_addr */
1833 		outw(PIOP1(base), 0);	      /* buffer_base */
1864     outw(PIOR0(base), tbd_p);
1866 	outw(PIOP0(base), inw(PIOP0(base)) + ETHERMIN - clen);
1867 	outw(PIOR1(base), xmtdata_p);
1869 	    outw(PIOP1(base), 0);
1871     outw(PIOP0(base), inw(PIOP0(base)) | TBD_SW_EOF);
1872     outw(PIOR0(base), tbd_p + 2);
1873     outw(PIOP0(base), I82586NULL);
1883     outw(PIOR0(base), OFFSET_SCB + 2);	/* address of scb_command */
1896     outw(PIOP0(base), SCB_CU_STRT);		/* new command */
1935 	outw(PIOR1(base), fd_p);
1941     outw(PIOR1(base), fd_p + 2);
1942     outw(PIOP1(base), AC_CW_EL);	/* command */
1943     outw(PIOP1(base), I82586NULL);	/* link_offset */
1946     outw(PIOR0(base), fd_p + 6);	/* address of rbd_offset */
1947     outw(PIOP0(base), rbd_p);
1948     outw(PIOR1(base), rbd_p);
1963 	outw(PIOR1(base), rbd_p);
1986     outw(PIOR0(base), OFFSET_SCB);
1992     outw(PIOR0(base), OFFSET_SCB + 2);
1993     outw(PIOP0(base), SCB_RU_STRT);		/* command */
1995     outw(PIOR0(base), OFFSET_SCB + 6);	/* address of scb_rfa_offset */
1996     outw(PIOP0(base), rfa);
2019     outw(PIOR0(base), OFFSET_SCB);
2028     outw(PIOR1(base), OFFSET_CU);
2029     outw(PIOP1(base), 0);			/* ac_status */
2030     outw(PIOP1(base), AC_DIAGNOSE|AC_CW_EL);/* ac_command */
2033     outw(PIOR0(base), OFFSET_CU);
2063     outw(PIOR0(base), OFFSET_SCB);
2072     outw(PIOR1(base), OFFSET_CU);
2073     outw(PIOP1(base), 0);				/* ac_status */
2074     outw(PIOP1(base), AC_CONFIGURE|AC_CW_EL);	/* ac_command */
2107     outw(PIOR1(base), OFFSET_CU + 6);
2113     outw(PIOR1(base), OFFSET_CU);
2114     outw(PIOP1(base), 0);				/* ac_status */
2115     outw(PIOP1(base), AC_MCSETUP|AC_CW_EL);		/* ac_command */
2116     outw(PIOR1(base), OFFSET_CU + 8);
2123         outw(PIOP1(base), addrp[0] + (addrp[1] << 8));
2124         outw(PIOP1(base), addrp[2] + (addrp[3] << 8));
2125         outw(PIOP1(base), addrp[4] + (addrp[5] << 8));
2129     outw(PIOR1(base), OFFSET_CU + 6);		/* mc-cnt */
2130     outw(PIOP1(base), cnt * WAVELAN_ADDR_SIZE);
2135     outw(PIOR1(base), OFFSET_CU);
2136     outw(PIOP1(base), 0);				/* ac_status */
2137     outw(PIOP1(base), AC_IASETUP|AC_CW_EL);		/* ac_command */
2138     outw(PIOR1(base), OFFSET_CU + 6);
2161     outw(PIOR0(base), OFFSET_SCB + 2);	/* address of scb_command */
2162     outw(PIOP0(base), SCB_CU_STRT);
2166     outw(PIOR0(base), OFFSET_CU);
2171 	printf("wl%d: %s failed; status = %d, inw = %x, outw = %x\n",
2173 	outw(PIOR0(base), OFFSET_SCB);
2175 	outw(PIOR0(base), OFFSET_SCB+2);
2177 	outw(PIOR0(base), OFFSET_SCB+4);
2179 	outw(PIOR0(base), OFFSET_CU+2);
2184     outw(PIOR0(base), OFFSET_SCB);
2209     outw(PIOR1(base), OFFSET_SCB);
2216     outw(PIOP1(base), cmd);
2218     outw(PIOR0(base), OFFSET_SCB + 2);	/* address of scb_command */
2237 	outw(PIOR1(base), tbd_p);
2352     outw(MMCR(base),reg << 1);
2388 	outw(PIOR2(base), i);
2423 	outw(PIOR2(base),i);  /* write param memory */
2428     outw(PIOR2(base),WLPSA_CRCOK);  /* update CRC flag*/