Lines Matching refs:hldev
44 __hal_device_t *hldev = (__hal_device_t *) devh;
54 if (!(hldev->access_rights & VXGE_HAL_DEVICE_ACCESS_RIGHT_MRPCIM)) {
65 return (hldev->mrpcim->vpd_data.serial_num);
134 __hal_device_t *hldev = (__hal_device_t *) devh;
138 vxge_assert(hldev != NULL);
146 if (!(hldev->access_rights & VXGE_HAL_DEVICE_ACCESS_RIGHT_MRPCIM)) {
211 status = __hal_vpath_pcie_func_mode_set(hldev, hldev->first_vp_id, fmode);
369 __hal_device_t *hldev = (__hal_device_t *) devh;
380 if (!(hldev->access_rights & VXGE_HAL_DEVICE_ACCESS_RIGHT_MRPCIM)) {
407 hldev->header.config.mrpcim_config.vp_qos[vp_id].priority =
409 hldev->header.config.mrpcim_config.vp_qos[vp_id].min_bandwidth =
411 hldev->header.config.mrpcim_config.vp_qos[vp_id].max_bandwidth =
441 __hal_device_t *hldev = (__hal_device_t *) devh;
465 hldev->header.config.mrpcim_config.vp_qos[vp_id].min_bandwidth;
468 hldev->header.config.mrpcim_config.vp_qos[vp_id].min_bandwidth;
471 hldev->header.config.mrpcim_config.vp_qos[vp_id].max_bandwidth;
502 __hal_device_t *hldev = (__hal_device_t *) devh;
514 if (!(hldev->access_rights & VXGE_HAL_DEVICE_ACCESS_RIGHT_MRPCIM)) {
524 prtad = hldev->mrpcim->mdio_dte_prtad0;
526 prtad = hldev->mrpcim->mdio_dte_prtad1;
529 prtad = hldev->mrpcim->mdio_phy_prtad0;
531 prtad = hldev->mrpcim->mdio_phy_prtad1;
544 vxge_os_pio_mem_write64(hldev->header.pdev,
545 hldev->header.regh0,
547 &hldev->mrpcim_reg->mdio_mgr_access_port[port]);
551 status = vxge_hal_device_register_poll(hldev->header.pdev,
552 hldev->header.regh0,
553 &hldev->mrpcim_reg->mdio_mgr_access_port[port],
557 hldev->header.config.device_poll_millis);
566 val64 = vxge_os_pio_mem_read64(hldev->header.pdev,
567 hldev->header.regh0,
568 &hldev->mrpcim_reg->mdio_mgr_access_port[port]);
597 __hal_device_t *hldev = (__hal_device_t *) devh;
607 if (!(hldev->access_rights & VXGE_HAL_DEVICE_ACCESS_RIGHT_MRPCIM)) {
616 mrpcim_reg = hldev->mrpcim_reg;
786 vxge_os_pio_mem_read64(hldev->header.pdev,
787 hldev->header.regh0,
1637 hldev->header.pdev,
1638 hldev->header.regh0,
1662 __hal_device_t *hldev = (__hal_device_t *) devh;
1672 if (!(hldev->access_rights & VXGE_HAL_DEVICE_ACCESS_RIGHT_MRPCIM)) {
1681 mrpcim_reg = hldev->mrpcim_reg;
1852 hldev->header.pdev,
1853 hldev->header.regh0,
1880 __hal_device_t *hldev = (__hal_device_t *) devh;
1890 if (!(hldev->access_rights & VXGE_HAL_DEVICE_ACCESS_RIGHT_MRPCIM)) {
1899 if (!hldev->header.is_initialized)
1902 if (hldev->device_resetting == 1) {
1910 (void) __hal_ifmsg_wmsg_post(hldev,
1911 hldev->first_vp_id,
1918 val64 = vxge_os_pio_mem_read64(hldev->header.pdev,
1919 hldev->header.regh0,
1920 &hldev->mrpcim_reg->sw_reset_cfg1);
1924 vxge_os_pio_mem_write64(hldev->header.pdev,
1925 hldev->header.regh0,
1927 &hldev->mrpcim_reg->sw_reset_cfg1);
1929 vxge_os_pio_mem_write64(hldev->header.pdev,
1930 hldev->header.regh0,
1933 &hldev->mrpcim_reg->bf_sw_reset);
1935 hldev->stats.sw_dev_info_stats.soft_reset_cnt++;
1937 hldev->device_resetting = 1;
1964 __hal_device_t *hldev = (__hal_device_t *) devh;
1973 if (!(hldev->access_rights & VXGE_HAL_DEVICE_ACCESS_RIGHT_MRPCIM)) {
1982 if (!hldev->header.is_initialized) {
1989 if ((status = __hal_device_reg_addr_get(hldev)) != VXGE_HAL_OK) {
1992 hldev->device_resetting = 0;
1996 __hal_device_id_get(hldev);
1998 __hal_device_host_info_get(hldev);
2000 hldev->hw_is_initialized = 0;
2002 hldev->device_resetting = 0;
2004 vxge_os_memzero(hldev->mrpcim->mrpcim_stats,
2007 vxge_os_memzero(&hldev->mrpcim->mrpcim_stats_sav,
2010 status = __hal_mrpcim_mac_configure(hldev);
2018 status = __hal_mrpcim_lag_configure(hldev);
2026 val64 = vxge_os_pio_mem_read64(hldev->header.pdev,
2027 hldev->header.regh0,
2028 &hldev->mrpcim_reg->mdio_gen_cfg_port[0]);
2030 hldev->mrpcim->mdio_phy_prtad0 =
2033 val64 = vxge_os_pio_mem_read64(hldev->header.pdev,
2034 hldev->header.regh0,
2035 &hldev->mrpcim_reg->mdio_gen_cfg_port[1]);
2037 hldev->mrpcim->mdio_phy_prtad1 =
2040 val64 = vxge_os_pio_mem_read64(hldev->header.pdev,
2041 hldev->header.regh0,
2042 &hldev->mrpcim_reg->xgxs_static_cfg_port[0]);
2044 hldev->mrpcim->mdio_dte_prtad0 =
2047 val64 = vxge_os_pio_mem_read64(hldev->header.pdev,
2048 hldev->header.regh0,
2049 &hldev->mrpcim_reg->xgxs_static_cfg_port[1]);
2051 hldev->mrpcim->mdio_dte_prtad1 =
2054 vxge_os_pio_mem_write64(hldev->header.pdev,
2055 hldev->header.regh0,
2056 hldev->mrpcim->mrpcim_stats_block->dma_addr,
2057 &hldev->mrpcim_reg->mrpcim_stats_start_host_addr);
2059 vxge_os_pio_mem_write64(hldev->header.pdev,
2060 hldev->header.regh0,
2061 hldev->vpath_assignments,
2062 &hldev->mrpcim_reg->rxmac_authorize_all_addr);
2064 vxge_os_pio_mem_write64(hldev->header.pdev,
2065 hldev->header.regh0,
2066 hldev->vpath_assignments,
2067 &hldev->mrpcim_reg->rxmac_authorize_all_vid);
2069 (void) __hal_ifmsg_wmsg_post(hldev,
2070 hldev->first_vp_id,
2085 * @hldev: pointer to __hal_device_t structure
2095 __hal_mrpcim_xpak_counter_check(__hal_device_t *hldev,
2098 vxge_assert(hldev != NULL);
2104 "hldev = 0x"VXGE_OS_STXFMT", port = %d, type = %d, value = %d",
2105 (ptr_t) hldev, port, type, value);
2107 if (!(hldev->access_rights & VXGE_HAL_DEVICE_ACCESS_RIGHT_MRPCIM)) {
2123 hldev->mrpcim->xpak_stats[port].excess_temp = 0;
2130 hldev->header.upper_layer_data,
2136 hldev->mrpcim->xpak_stats[port].excess_bias_current = 0;
2143 hldev->header.upper_layer_data,
2149 hldev->mrpcim->xpak_stats[port].excess_laser_output = 0;
2157 hldev->header.upper_layer_data,
2185 __hal_device_t *hldev = (__hal_device_t *) devh;
2187 vxge_assert(hldev != NULL);
2192 vxge_hal_trace_log_stats("hldev = 0x"VXGE_OS_STXFMT", port = %d",
2193 (ptr_t) hldev, port);
2195 if (!(hldev->access_rights & VXGE_HAL_DEVICE_ACCESS_RIGHT_MRPCIM)) {
2249 hldev->mrpcim->xpak_stats[port].alarm_transceiver_temp_high++;
2250 hldev->mrpcim->xpak_stats[port].excess_temp++;
2251 __hal_mrpcim_xpak_counter_check(hldev, port,
2253 hldev->mrpcim->xpak_stats[port].excess_temp);
2255 hldev->mrpcim->xpak_stats[port].excess_temp = 0;
2260 hldev->mrpcim->xpak_stats[port].alarm_transceiver_temp_low++;
2265 hldev->mrpcim->xpak_stats[port].alarm_laser_bias_current_high++;
2266 hldev->mrpcim->xpak_stats[port].excess_bias_current++;
2267 __hal_mrpcim_xpak_counter_check(hldev, port,
2269 hldev->mrpcim->xpak_stats[port].excess_bias_current);
2271 hldev->mrpcim->xpak_stats[port].excess_bias_current = 0;
2276 hldev->mrpcim->xpak_stats[port].alarm_laser_bias_current_low++;
2281 hldev->mrpcim->xpak_stats[port].alarm_laser_output_power_high++;
2282 hldev->mrpcim->xpak_stats[port].excess_laser_output++;
2283 __hal_mrpcim_xpak_counter_check(hldev, port,
2285 hldev->mrpcim->xpak_stats[port].excess_laser_output);
2287 hldev->mrpcim->xpak_stats[port].excess_laser_output = 0;
2292 hldev->mrpcim->xpak_stats[port].alarm_laser_output_power_low++;
2311 hldev->mrpcim->xpak_stats[port].warn_transceiver_temp_high++;
2313 hldev->mrpcim->xpak_stats[port].warn_transceiver_temp_low++;
2315 hldev->mrpcim->xpak_stats[port].warn_laser_bias_current_high++;
2317 hldev->mrpcim->xpak_stats[port].warn_laser_bias_current_low++;
2319 hldev->mrpcim->xpak_stats[port].warn_laser_output_power_high++;
2321 hldev->mrpcim->xpak_stats[port].warn_laser_output_power_low++;
2342 __hal_device_t *hldev = (__hal_device_t *) devh;
2352 if (!(hldev->access_rights & VXGE_HAL_DEVICE_ACCESS_RIGHT_MRPCIM)) {
2361 vxge_os_memcpy(&hldev->mrpcim->mrpcim_stats_sav,
2362 hldev->mrpcim->mrpcim_stats,
2365 if (hldev->header.config.stats_read_method ==
2368 val64 = vxge_os_pio_mem_read64(hldev->header.pdev,
2369 hldev->header.regh0,
2370 &hldev->mrpcim_reg->mrpcim_general_cfg2);
2374 vxge_os_pio_mem_write64(hldev->header.pdev,
2375 hldev->header.regh0,
2377 &hldev->mrpcim_reg->mrpcim_general_cfg2);
2379 val64 = vxge_os_pio_mem_read64(hldev->header.pdev,
2380 hldev->header.regh0,
2381 &hldev->common_reg->stats_cfg0);
2384 (1 << (16 - hldev->first_vp_id)));
2386 vxge_hal_pio_mem_write32_upper(hldev->header.pdev,
2387 hldev->header.regh0,
2389 &hldev->common_reg->stats_cfg0);
2392 hldev,
2393 hldev->mrpcim->mrpcim_stats);
2416 __hal_device_t *hldev = (__hal_device_t *) devh;
2426 if (!(hldev->access_rights & VXGE_HAL_DEVICE_ACCESS_RIGHT_MRPCIM)) {
2435 val64 = vxge_os_pio_mem_read64(hldev->header.pdev,
2436 hldev->header.regh0,
2437 &hldev->mrpcim_reg->mrpcim_general_cfg2);
2441 vxge_os_pio_mem_write64(hldev->header.pdev,
2442 hldev->header.regh0,
2444 &hldev->mrpcim_reg->mrpcim_general_cfg2);
2467 __hal_device_t *hldev = (__hal_device_t *) devh;
2469 vxge_assert((hldev != NULL) && (stats != NULL));
2478 if (!(hldev->access_rights & VXGE_HAL_DEVICE_ACCESS_RIGHT_MRPCIM)) {
2487 if (hldev->header.config.stats_read_method ==
2490 status = vxge_hal_device_register_poll(hldev->header.pdev,
2491 hldev->header.regh0,
2492 &hldev->common_reg->stats_cfg0,
2495 (1 << (16 - hldev->first_vp_id))),
2496 hldev->header.config.device_poll_millis);
2498 val64 = vxge_os_pio_mem_read64(hldev->header.pdev,
2499 hldev->header.regh0,
2500 &hldev->mrpcim_reg->mrpcim_general_cfg2);
2504 vxge_os_pio_mem_write64(hldev->header.pdev,
2505 hldev->header.regh0,
2507 &hldev->mrpcim_reg->mrpcim_general_cfg2);
2512 hldev->mrpcim->mrpcim_stats,
2543 __hal_device_t *hldev = (__hal_device_t *) devh;
2554 if (!(hldev->access_rights & VXGE_HAL_DEVICE_ACCESS_RIGHT_MRPCIM)) {
2568 vxge_hal_pio_mem_write32_lower(hldev->header.pdev,
2569 hldev->header.regh0,
2571 &hldev->mrpcim_reg->xmac_stats_sys_cmd);
2575 vxge_hal_pio_mem_write32_upper(hldev->header.pdev,
2576 hldev->header.regh0,
2578 &hldev->mrpcim_reg->xmac_stats_sys_cmd);
2582 status = vxge_hal_device_register_poll(hldev->header.pdev,
2583 hldev->header.regh0,
2584 &hldev->mrpcim_reg->xmac_stats_sys_cmd,
2587 hldev->header.config.device_poll_millis);
2591 *stat = vxge_os_pio_mem_read64(hldev->header.pdev,
2592 hldev->header.regh0,
2593 &hldev->mrpcim_reg->xmac_stats_sys_data);
2620 __hal_device_t *hldev = (__hal_device_t *) devh;
2631 if (!(hldev->access_rights & VXGE_HAL_DEVICE_ACCESS_RIGHT_MRPCIM)) {
2739 __hal_device_t *hldev = (__hal_device_t *) devh;
2750 if (!(hldev->access_rights & VXGE_HAL_DEVICE_ACCESS_RIGHT_MRPCIM)) {
3337 __hal_device_t *hldev = (__hal_device_t *) devh;
3346 "hldev = 0x"VXGE_OS_STXFMT", mrpcim_stats = 0x"VXGE_OS_STXFMT,
3350 if (!(hldev->access_rights & VXGE_HAL_DEVICE_ACCESS_RIGHT_MRPCIM)) {
3399 * @hldev: hal device.
3408 __hal_device_t *hldev,
3413 vxge_hal_device_h devh = (vxge_hal_device_h) hldev;
3416 vxge_assert((hldev != NULL) && (mrpcim_stats != NULL));
3422 "hldev = 0x"VXGE_OS_STXFMT", mrpcim_stats = 0x"VXGE_OS_STXFMT,
3423 (ptr_t) hldev, (ptr_t) mrpcim_stats);
3425 val64 = vxge_os_pio_mem_read64(hldev->header.pdev,
3426 hldev->header.regh0,
3427 &hldev->mrpcim_reg->mrpcim_debug_stats0);
3436 val64 = vxge_os_pio_mem_read64(hldev->header.pdev,
3437 hldev->header.regh0,
3438 &hldev->mrpcim_reg->mrpcim_debug_stats1_vplane[i]);
3445 val64 = vxge_os_pio_mem_read64(hldev->header.pdev,
3446 hldev->header.regh0,
3447 &hldev->mrpcim_reg->mrpcim_debug_stats2_vplane[i]);
3454 val64 = vxge_os_pio_mem_read64(hldev->header.pdev,
3455 hldev->header.regh0,
3456 &hldev->mrpcim_reg->mrpcim_debug_stats3_vplane[i]);
3464 val64 = vxge_os_pio_mem_read64(hldev->header.pdev,
3465 hldev->header.regh0,
3466 &hldev->mrpcim_reg->mrpcim_debug_stats4);
3474 val64 = vxge_os_pio_mem_read64(hldev->header.pdev,
3475 hldev->header.regh0,
3476 &hldev->mrpcim_reg->genstats_count01);
3484 val64 = vxge_os_pio_mem_read64(hldev->header.pdev,
3485 hldev->header.regh0,
3486 &hldev->mrpcim_reg->genstats_count23);
3494 val64 = vxge_os_pio_mem_read64(hldev->header.pdev,
3495 hldev->header.regh0,
3496 &hldev->mrpcim_reg->genstats_count4);
3501 val64 = vxge_os_pio_mem_read64(hldev->header.pdev,
3502 hldev->header.regh0,
3503 &hldev->mrpcim_reg->genstats_count5);
3508 val64 = vxge_os_pio_mem_read64(hldev->header.pdev,
3509 hldev->header.regh0,
3510 &hldev->mrpcim_reg->debug_stats0);
3518 val64 = vxge_os_pio_mem_read64(hldev->header.pdev,
3519 hldev->header.regh0,
3520 &hldev->mrpcim_reg->debug_stats1);
3528 val64 = vxge_os_pio_mem_read64(hldev->header.pdev,
3529 hldev->header.regh0,
3530 &hldev->mrpcim_reg->debug_stats2);
3536 val64 = vxge_os_pio_mem_read64(hldev->header.pdev,
3537 hldev->header.regh0,
3538 &hldev->mrpcim_reg->debug_stats3_vplane);
3549 val64 = vxge_os_pio_mem_read64(hldev->header.pdev,
3550 hldev->header.regh0,
3551 &hldev->mrpcim_reg->debug_stats4_vplane);
3563 status = vxge_hal_mrpcim_xmac_aggr_stats_get(hldev,
3573 status = vxge_hal_mrpcim_xmac_aggr_stats_get(hldev,
3585 status = vxge_hal_mrpcim_xmac_port_stats_get(hldev,
3609 val64 = vxge_os_pio_mem_read64(hldev->header.pdev,
3610 hldev->header.regh0,
3611 &hldev->mrpcim_reg->orp_lro_events);
3616 val64 = vxge_os_pio_mem_read64(hldev->header.pdev,
3617 hldev->header.regh0,
3618 &hldev->mrpcim_reg->orp_bs_events);
3623 val64 = vxge_os_pio_mem_read64(hldev->header.pdev,
3624 hldev->header.regh0,
3625 &hldev->mrpcim_reg->orp_iwarp_events);
3630 val64 = vxge_os_pio_mem_read64(hldev->header.pdev,
3631 hldev->header.regh0,
3632 &hldev->mrpcim_reg->dbg_stats_tpa_tx_path);
3637 val64 = vxge_os_pio_mem_read64(hldev->header.pdev,
3638 hldev->header.regh0,
3639 &hldev->mrpcim_reg->dbg_stat_tx_any_frms);
3650 val64 = vxge_os_pio_mem_read64(hldev->header.pdev,
3651 hldev->header.regh0,
3652 &hldev->mrpcim_reg->dbg_stat_rx_any_frms);
3681 __hal_device_t *hldev = (__hal_device_t *) devh;
3683 vxge_assert(hldev != NULL);
3691 if (!(hldev->access_rights & VXGE_HAL_DEVICE_ACCESS_RIGHT_MRPCIM)) {
3699 vxge_os_memcpy(&hldev->mrpcim->mrpcim_stats_sav,
3700 hldev->mrpcim->mrpcim_stats,
3703 vxge_os_memzero(hldev->mrpcim->mrpcim_stats,
3706 vxge_os_memzero(&hldev->stats.sw_dev_err_stats,
3709 hldev->stats.sw_dev_info_stats.soft_reset_cnt = 0;
3713 if (!(hldev->vpaths_deployed & mBIT(i)))
3717 VXGE_HAL_VIRTUAL_PATH_HANDLE(&hldev->virtual_paths[i]));
3746 __hal_device_t *hldev = (__hal_device_t *) devh;
3756 if (!(hldev->access_rights & VXGE_HAL_DEVICE_ACCESS_RIGHT_MRPCIM)) {
3765 status = __hal_vpath_udp_rth_set(hldev,
3766 hldev->first_vp_id,
3776 * @hldev: hal device.
3782 __hal_mrpcim_mac_configure(__hal_device_t *hldev)
3788 &hldev->header.config.mrpcim_config.mac_config;
3790 vxge_assert(hldev != NULL);
3795 vxge_hal_trace_log_mrpcim("hldev = 0x"VXGE_OS_STXFMT,
3796 (ptr_t) hldev);
3804 val64 = vxge_os_pio_mem_read64(hldev->header.pdev,
3805 hldev->header.regh0,
3806 &hldev->mrpcim_reg->txmac_cfg0_port[port_id]);
3820 val64 = vxge_os_pio_mem_read64(hldev->header.pdev,
3821 hldev->header.regh0,
3822 &hldev->mrpcim_reg->rxmac_cfg0_port[port_id]);
3840 vxge_os_pio_mem_write64(hldev->header.pdev,
3841 hldev->header.regh0,
3843 &hldev->mrpcim_reg->xgmac_main_cfg_port[port_id]);
3848 val64 = vxge_os_pio_mem_read64(hldev->header.pdev,
3849 hldev->header.regh0,
3850 &hldev->mrpcim_reg->rxmac_cfg0_port[port_id]);
3884 vxge_os_pio_mem_write64(hldev->header.pdev,
3885 hldev->header.regh0,
3887 &hldev->mrpcim_reg->rxmac_cfg0_port[port_id]);
3889 val64 = vxge_os_pio_mem_read64(hldev->header.pdev,
3890 hldev->header.regh0,
3891 &hldev->mrpcim_reg->rxmac_cfg2_port[port_id]);
3901 vxge_os_pio_mem_write64(hldev->header.pdev,
3902 hldev->header.regh0,
3904 &hldev->mrpcim_reg->rxmac_cfg2_port[port_id]);
3906 val64 = vxge_os_pio_mem_read64(hldev->header.pdev,
3907 hldev->header.regh0,
3908 &hldev->mrpcim_reg->rxmac_pause_cfg_port[port_id]);
3958 vxge_os_pio_mem_write64(hldev->header.pdev,
3959 hldev->header.regh0,
3961 &hldev->mrpcim_reg->rxmac_pause_cfg_port[port_id]);
3963 val64 = vxge_os_pio_mem_read64(hldev->header.pdev,
3964 hldev->header.regh0,
3965 &hldev->mrpcim_reg->rxmac_link_util_port[port_id]);
3976 vxge_os_pio_mem_write64(hldev->header.pdev,
3977 hldev->header.regh0,
3979 &hldev->mrpcim_reg->rxmac_link_util_port[port_id]);
3981 val64 = vxge_os_pio_mem_read64(hldev->header.pdev,
3982 hldev->header.regh0,
3983 &hldev->mrpcim_reg->xgmac_debounce_port[port_id]);
4009 vxge_os_pio_mem_write64(hldev->header.pdev,
4010 hldev->header.regh0,
4012 &hldev->mrpcim_reg->xgmac_debounce_port[port_id]);
4014 val64 = vxge_os_pio_mem_read64(hldev->header.pdev,
4015 hldev->header.regh0,
4016 &hldev->mrpcim_reg->txmac_cfg0_port[port_id]);
4039 vxge_os_pio_mem_write64(hldev->header.pdev,
4040 hldev->header.regh0,
4042 &hldev->mrpcim_reg->txmac_cfg0_port[port_id]);
4044 val64 = vxge_os_pio_mem_read64(hldev->header.pdev,
4045 hldev->header.regh0,
4046 &hldev->mrpcim_reg->txmac_link_util_port);
4057 vxge_os_pio_mem_write64(hldev->header.pdev,
4058 hldev->header.regh0,
4060 &hldev->mrpcim_reg->txmac_link_util_port[port_id]);
4062 val64 = vxge_os_pio_mem_read64(hldev->header.pdev,
4063 hldev->header.regh0,
4064 &hldev->mrpcim_reg->ratemgmt_cfg_port);
4121 vxge_os_pio_mem_write64(hldev->header.pdev,
4122 hldev->header.regh0,
4124 &hldev->mrpcim_reg->ratemgmt_cfg_port[port_id]);
4130 val64 = vxge_os_pio_mem_read64(hldev->header.pdev,
4131 hldev->header.regh0,
4132 &hldev->mrpcim_reg->txmac_cfg0_port[
4147 val64 = vxge_os_pio_mem_read64(hldev->header.pdev,
4148 hldev->header.regh0,
4149 &hldev->mrpcim_reg->rxmac_cfg0_port[
4165 val64 = vxge_os_pio_mem_read64(hldev->header.pdev,
4166 hldev->header.regh0,
4167 &hldev->mrpcim_reg->rxmac_cfg0_port[
4201 vxge_os_pio_mem_write64(hldev->header.pdev,
4202 hldev->header.regh0,
4204 &hldev->mrpcim_reg->rxmac_cfg0_port[
4207 val64 = vxge_os_pio_mem_read64(hldev->header.pdev,
4208 hldev->header.regh0,
4209 &hldev->mrpcim_reg->rxmac_cfg2_port[
4220 vxge_os_pio_mem_write64(hldev->header.pdev,
4221 hldev->header.regh0,
4223 &hldev->mrpcim_reg->rxmac_cfg2_port[
4226 val64 = vxge_os_pio_mem_read64(hldev->header.pdev,
4227 hldev->header.regh0,
4228 &hldev->mrpcim_reg->rxmac_pause_cfg_port[
4279 vxge_os_pio_mem_write64(hldev->header.pdev,
4280 hldev->header.regh0,
4282 &hldev->mrpcim_reg->rxmac_pause_cfg_port[
4285 val64 = vxge_os_pio_mem_read64(hldev->header.pdev,
4286 hldev->header.regh0,
4287 &hldev->mrpcim_reg->rxmac_link_util_port[
4299 vxge_os_pio_mem_write64(hldev->header.pdev,
4300 hldev->header.regh0,
4302 &hldev->mrpcim_reg->rxmac_link_util_port[
4305 val64 = vxge_os_pio_mem_read64(hldev->header.pdev,
4306 hldev->header.regh0,
4307 &hldev->mrpcim_reg->txmac_cfg0_port[
4331 vxge_os_pio_mem_write64(hldev->header.pdev,
4332 hldev->header.regh0,
4334 &hldev->mrpcim_reg->txmac_cfg0_port[
4337 val64 = vxge_os_pio_mem_read64(hldev->header.pdev,
4338 hldev->header.regh0,
4339 &hldev->mrpcim_reg->txmac_link_util_port);
4350 vxge_os_pio_mem_write64(hldev->header.pdev,
4351 hldev->header.regh0,
4353 &hldev->mrpcim_reg->txmac_link_util_port[
4358 val64 = vxge_os_pio_mem_read64(hldev->header.pdev,
4359 hldev->header.regh0,
4360 &hldev->mrpcim_reg->txmac_gen_cfg1);
4432 vxge_os_pio_mem_write64(hldev->header.pdev,
4433 hldev->header.regh0,
4435 &hldev->mrpcim_reg->txmac_gen_cfg1);
4437 val64 = vxge_os_pio_mem_read64(hldev->header.pdev,
4438 hldev->header.regh0,
4439 &hldev->mrpcim_reg->rxmac_rx_pa_cfg0);
4513 vxge_os_pio_mem_write64(hldev->header.pdev,
4514 hldev->header.regh0,
4516 &hldev->mrpcim_reg->rxmac_rx_pa_cfg0);
4518 val64 = vxge_os_pio_mem_read64(hldev->header.pdev,
4519 hldev->header.regh0,
4520 &hldev->mrpcim_reg->fau_pa_cfg);
4552 vxge_os_pio_mem_write64(hldev->header.pdev,
4553 hldev->header.regh0,
4555 &hldev->mrpcim_reg->fau_pa_cfg);
4557 val64 = vxge_os_pio_mem_read64(hldev->header.pdev,
4558 hldev->header.regh0,
4559 &hldev->mrpcim_reg->rxmac_rx_pa_cfg1);
4630 vxge_os_pio_mem_write64(hldev->header.pdev,
4631 hldev->header.regh0,
4633 &hldev->mrpcim_reg->rxmac_rx_pa_cfg1);
4635 val64 = vxge_os_pio_mem_read64(hldev->header.pdev,
4636 hldev->header.regh0,
4637 &hldev->mrpcim_reg->xmac_gen_cfg);
4652 vxge_os_pio_mem_write64(hldev->header.pdev,
4653 hldev->header.regh0,
4655 &hldev->mrpcim_reg->xmac_gen_cfg);
4657 val64 = vxge_os_pio_mem_read64(hldev->header.pdev,
4658 hldev->header.regh0,
4659 &hldev->mrpcim_reg->tpa_global_cfg);
4681 vxge_os_pio_mem_write64(hldev->header.pdev,
4682 hldev->header.regh0,
4684 &hldev->mrpcim_reg->tpa_global_cfg);
4694 * @hldev: hal device.
4700 __hal_mrpcim_lag_configure(__hal_device_t *hldev)
4707 &hldev->header.config.mrpcim_config.lag_config;
4709 vxge_assert(hldev != NULL);
4714 vxge_hal_trace_log_mrpcim("hldev = 0x"VXGE_OS_STXFMT,
4715 (ptr_t) hldev);
4718 val64 = vxge_os_pio_mem_read64(hldev->header.pdev,
4719 hldev->header.regh0,
4720 &hldev->mrpcim_reg->lag_cfg);
4735 vxge_os_pio_mem_write64(hldev->header.pdev,
4736 hldev->header.regh0,
4738 &hldev->mrpcim_reg->lag_cfg);
4782 vxge_os_pio_mem_write64(hldev->header.pdev,
4783 hldev->header.regh0,
4785 &hldev->mrpcim_reg->lag_cfg);
4787 val64 = vxge_os_pio_mem_read64(hldev->header.pdev,
4788 hldev->header.regh0,
4789 &hldev->mrpcim_reg->lag_tx_cfg);
4805 vxge_os_pio_mem_write64(hldev->header.pdev,
4806 hldev->header.regh0,
4808 &hldev->mrpcim_reg->lag_distrib_dest);
4813 vxge_os_pio_mem_read64(hldev->header.pdev,
4814 hldev->header.regh0,
4815 &hldev->mrpcim_reg->lag_distrib_dest);
4834 vxge_os_pio_mem_write64(hldev->header.pdev,
4835 hldev->header.regh0,
4837 &hldev->mrpcim_reg->lag_tx_cfg);
4839 val64 = vxge_os_pio_mem_read64(hldev->header.pdev,
4840 hldev->header.regh0,
4841 &hldev->mrpcim_reg->lag_active_passive_cfg);
4898 vxge_os_pio_mem_write64(hldev->header.pdev,
4899 hldev->header.regh0,
4901 &hldev->mrpcim_reg->lag_active_passive_cfg);
4903 val64 = vxge_os_pio_mem_read64(hldev->header.pdev,
4904 hldev->header.regh0,
4905 &hldev->mrpcim_reg->lag_lacp_cfg);
4943 vxge_os_pio_mem_write64(hldev->header.pdev,
4944 hldev->header.regh0,
4946 &hldev->mrpcim_reg->lag_lacp_cfg);
4948 val64 = vxge_os_pio_mem_read64(hldev->header.pdev,
4949 hldev->header.regh0,
4950 &hldev->mrpcim_reg->lag_marker_cfg);
4994 vxge_os_pio_mem_write64(hldev->header.pdev,
4995 hldev->header.regh0,
4997 &hldev->mrpcim_reg->lag_marker_cfg);
5001 val64 = vxge_os_pio_mem_read64(hldev->header.pdev,
5002 hldev->header.regh0,
5003 &hldev->mrpcim_reg->lag_port_cfg[i]);
5047 vxge_os_pio_mem_write64(hldev->header.pdev,
5048 hldev->header.regh0,
5050 &hldev->mrpcim_reg->lag_port_cfg[i]);
5052 val64 = vxge_os_pio_mem_read64(hldev->header.pdev,
5053 hldev->header.regh0,
5054 &hldev->mrpcim_reg->lag_port_actor_admin_cfg[i]);
5088 vxge_os_pio_mem_write64(hldev->header.pdev,
5089 hldev->header.regh0,
5091 &hldev->mrpcim_reg->lag_port_actor_admin_cfg[i]);
5093 val64 = vxge_os_pio_mem_read64(hldev->header.pdev,
5094 hldev->header.regh0,
5095 &hldev->mrpcim_reg->lag_port_actor_admin_state[i]);
5179 vxge_os_pio_mem_write64(hldev->header.pdev,
5180 hldev->header.regh0,
5182 &hldev->mrpcim_reg->lag_port_actor_admin_state[i]);
5184 val64 = vxge_os_pio_mem_read64(hldev->header.pdev,
5185 hldev->header.regh0,
5186 &hldev->mrpcim_reg->lag_port_partner_admin_cfg[i]);
5220 vxge_os_pio_mem_write64(hldev->header.pdev,
5221 hldev->header.regh0,
5223 &hldev->mrpcim_reg->lag_port_partner_admin_cfg[i]);
5225 val64 = vxge_os_pio_mem_read64(hldev->header.pdev,
5226 hldev->header.regh0,
5227 &hldev->mrpcim_reg->lag_port_partner_admin_state[i]);
5311 vxge_os_pio_mem_write64(hldev->header.pdev,
5312 hldev->header.regh0,
5314 &hldev->mrpcim_reg->lag_port_partner_admin_state[i]);
5316 val64 = vxge_os_pio_mem_read64(hldev->header.pdev,
5317 hldev->header.regh0,
5318 &hldev->mrpcim_reg->lag_port_partner_admin_sys_id[i]);
5335 vxge_os_pio_mem_write64(hldev->header.pdev,
5336 hldev->header.regh0,
5338 &hldev->mrpcim_reg->lag_port_partner_admin_sys_id[i]);
5344 val64 = vxge_os_pio_mem_read64(hldev->header.pdev,
5345 hldev->header.regh0,
5346 &hldev->mrpcim_reg->lag_aggr_id_cfg[i]);
5352 vxge_os_pio_mem_write64(hldev->header.pdev,
5353 hldev->header.regh0,
5355 &hldev->mrpcim_reg->lag_aggr_id_cfg[i]);
5357 val64 = vxge_os_pio_mem_read64(hldev->header.pdev,
5358 hldev->header.regh0,
5359 &hldev->mrpcim_reg->lag_aggr_addr_cfg[i]);
5394 vxge_os_pio_mem_write64(hldev->header.pdev,
5395 hldev->header.regh0,
5397 &hldev->mrpcim_reg->lag_aggr_addr_cfg[i]);
5401 val64 = vxge_os_pio_mem_read64(hldev->header.pdev,
5402 hldev->header.regh0,
5403 &hldev->mrpcim_reg->lag_aggr_admin_key[i]);
5409 vxge_os_pio_mem_write64(hldev->header.pdev,
5410 hldev->header.regh0,
5412 &hldev->mrpcim_reg->lag_aggr_admin_key[i]);
5417 val64 = vxge_os_pio_mem_read64(hldev->header.pdev,
5418 hldev->header.regh0,
5419 &hldev->mrpcim_reg->lag_sys_cfg);
5425 vxge_os_pio_mem_write64(hldev->header.pdev,
5426 hldev->header.regh0,
5428 &hldev->mrpcim_reg->lag_sys_cfg);
5431 val64 = vxge_os_pio_mem_read64(hldev->header.pdev,
5432 hldev->header.regh0,
5433 &hldev->mrpcim_reg->lag_sys_id);
5464 vxge_os_pio_mem_write64(hldev->header.pdev,
5465 hldev->header.regh0,
5467 &hldev->mrpcim_reg->lag_sys_id);
5470 val64 = vxge_os_pio_mem_read64(hldev->header.pdev,
5471 hldev->header.regh0,
5472 &hldev->mrpcim_reg->lag_aggr_alt_admin_key);
5490 vxge_os_pio_mem_write64(hldev->header.pdev,
5491 hldev->header.regh0,
5493 &hldev->mrpcim_reg->lag_aggr_alt_admin_key);
5495 val64 = vxge_os_pio_mem_read64(hldev->header.pdev,
5496 hldev->header.regh0,
5497 &hldev->mrpcim_reg->lag_timer_cfg_1);
5523 vxge_os_pio_mem_write64(hldev->header.pdev,
5524 hldev->header.regh0,
5526 &hldev->mrpcim_reg->lag_timer_cfg_1);
5528 val64 = vxge_os_pio_mem_read64(hldev->header.pdev,
5529 hldev->header.regh0,
5530 &hldev->mrpcim_reg->lag_timer_cfg_2);
5558 vxge_os_pio_mem_write64(hldev->header.pdev,
5559 hldev->header.regh0,
5561 &hldev->mrpcim_reg->lag_timer_cfg_2);
5572 * @hldev: HAL device handle.
5578 __hal_mrpcim_get_vpd_data(__hal_device_t *hldev)
5585 u32 max_count = hldev->header.config.device_poll_millis * 10;
5587 vxge_assert(hldev);
5592 vxge_hal_trace_log_mrpcim("hldev = 0x"VXGE_OS_STXFMT,
5593 (ptr_t) hldev);
5595 addr_offset = hldev->pci_caps.vpd_cap_offset +
5598 data_offset = hldev->pci_caps.vpd_cap_offset +
5601 vxge_os_strlcpy((char *) hldev->mrpcim->vpd_data.product_name,
5603 sizeof(hldev->mrpcim->vpd_data.product_name));
5604 vxge_os_strlcpy((char *) hldev->mrpcim->vpd_data.serial_num,
5606 sizeof(hldev->mrpcim->vpd_data.serial_num));
5608 if (hldev->func_id != 0) {
5614 vpd_data = (u8 *) vxge_os_malloc(hldev->header.pdev,
5620 vxge_os_pci_write16(hldev->header.pdev,
5621 hldev->header.cfgh,
5625 (void) __hal_vpath_pci_read(hldev,
5626 hldev->first_vp_id,
5638 (void) __hal_vpath_pci_read(hldev,
5639 hldev->first_vp_id,
5658 hldev->mrpcim->vpd_data.serial_num,
5661 hldev->mrpcim->vpd_data.serial_num,
5670 hldev->mrpcim->vpd_data.product_name, vpd_data[1]);
5671 (void) vxge_os_memcpy(hldev->mrpcim->vpd_data.product_name,
5676 vxge_os_free(hldev->header.pdev,
5726 __hal_device_t *hldev;
5732 hldev = (__hal_device_t *) devh;
5762 vxge_hal_pio_mem_write32_lower(hldev->header.pdev,
5763 hldev->header.regh0,
5765 &hldev->mrpcim_reg->rts_mgr_steer_ctrl);
5769 vxge_hal_pio_mem_write32_upper(hldev->header.pdev,
5770 hldev->header.regh0,
5772 &hldev->mrpcim_reg->rts_mgr_steer_ctrl);
5777 hldev->header.pdev,
5778 hldev->header.regh0,
5779 &hldev->mrpcim_reg->rts_mgr_steer_ctrl, 0,
5781 WAIT_FACTOR * hldev->header.config.device_poll_millis);
5791 hldev->header.pdev,
5792 hldev->header.regh0,
5793 &hldev->mrpcim_reg->rts_mgr_steer_ctrl);
5799 hldev->header.pdev,
5800 hldev->header.regh0,
5801 &hldev->mrpcim_reg->rts_mgr_steer_data0);
5804 hldev->header.pdev,
5805 hldev->header.regh0,
5806 &hldev->mrpcim_reg->rts_mgr_steer_data1);
5809 hldev->header.pdev,
5810 hldev->header.regh0,
5811 &hldev->mrpcim_reg->rts_mgr_steer_vpath_vector);
5855 __hal_device_t *hldev;
5860 hldev = (__hal_device_t *) devh;
5947 __hal_device_t *hldev;
5952 hldev = (__hal_device_t *) devh;
5957 vxge_hal_trace_log_mrpcim("hldev = 0x"VXGE_OS_STXFMT,
5958 (ptr_t) hldev);
6008 __hal_device_t *hldev = (__hal_device_t *) devh;
6010 vxge_assert(hldev != NULL);
6018 if (!(hldev->access_rights & VXGE_HAL_DEVICE_ACCESS_RIGHT_MRPCIM)) {
6026 if (hldev->header.config.mrpcim_config.mac_config.
6034 val64 = vxge_os_pio_mem_read64(hldev->header.pdev,
6035 hldev->header.regh0,
6036 &hldev->mrpcim_reg->rxmac_rx_pa_cfg1);
6040 vxge_os_pio_mem_write64(hldev->header.pdev,
6041 hldev->header.regh0,
6043 &hldev->mrpcim_reg->rxmac_rx_pa_cfg1);
6045 hldev->header.config.mrpcim_config.mac_config.rpa_repl_strip_vlan_tag =
6067 __hal_device_t *hldev = (__hal_device_t *) devh;
6069 vxge_assert(hldev != NULL);
6077 if (!(hldev->access_rights & VXGE_HAL_DEVICE_ACCESS_RIGHT_MRPCIM)) {
6085 if (hldev->header.config.mrpcim_config.mac_config.
6093 val64 = vxge_os_pio_mem_read64(hldev->header.pdev,
6094 hldev->header.regh0,
6095 &hldev->mrpcim_reg->rxmac_rx_pa_cfg1);
6099 vxge_os_pio_mem_write64(hldev->header.pdev,
6100 hldev->header.regh0,
6102 &hldev->mrpcim_reg->rxmac_rx_pa_cfg1);
6104 hldev->header.config.mrpcim_config.mac_config.rpa_repl_strip_vlan_tag =
6127 __hal_device_t *hldev = (__hal_device_t *) devh;
6129 vxge_assert(hldev != NULL);
6138 if (!(hldev->access_rights & VXGE_HAL_DEVICE_ACCESS_RIGHT_MRPCIM)) {
6147 &hldev->header.config.mrpcim_config.lag_config,
6171 __hal_device_t *hldev = (__hal_device_t *) devh;
6173 vxge_assert(hldev != NULL);
6182 if (!(hldev->access_rights & VXGE_HAL_DEVICE_ACCESS_RIGHT_MRPCIM)) {
6198 vxge_os_memcpy(&hldev->header.config.mrpcim_config.lag_config,
6202 status = __hal_mrpcim_lag_configure(hldev);
6235 __hal_device_t *hldev = (__hal_device_t *) devh;
6247 if (hldev->header.magic != VXGE_HAL_DEVICE_MAGIC) {
6259 if (!(hldev->access_rights & VXGE_HAL_DEVICE_ACCESS_RIGHT_MRPCIM)) {
6266 val64 = vxge_os_pio_mem_read64(hldev->header.pdev, hldev->header.regh0,
6267 &hldev->mrpcim_reg->rxmac_pause_cfg_port[port]);
6305 __hal_device_t *hldev = (__hal_device_t *) devh;
6316 if (hldev->header.magic != VXGE_HAL_DEVICE_MAGIC) {
6328 if (!(hldev->access_rights & VXGE_HAL_DEVICE_ACCESS_RIGHT_MRPCIM)) {
6335 val64 = vxge_os_pio_mem_read64(hldev->header.pdev, hldev->header.regh0,
6336 &hldev->mrpcim_reg->rxmac_pause_cfg_port[port]);
6346 vxge_os_pio_mem_write64(hldev->header.pdev, hldev->header.regh0,
6347 val64, &hldev->mrpcim_reg->rxmac_pause_cfg_port[port]);
6370 __hal_device_t *hldev = (__hal_device_t *) devh;
6383 if (hldev->header.magic != VXGE_HAL_DEVICE_MAGIC) {
6389 if (!(hldev->access_rights & VXGE_HAL_DEVICE_ACCESS_RIGHT_MRPCIM)) {
6396 (void) __hal_vpath_pci_read(hldev,
6397 hldev->first_vp_id,
6402 vxge_os_pci_write8(hldev->header.pdev, hldev->header.cfgh,
6406 (void) __hal_vpath_pci_read(hldev,
6407 hldev->first_vp_id,
6427 * @hldev: hal device.
6434 __hal_mrpcim_initialize(__hal_device_t *hldev)
6439 vxge_assert(hldev != NULL);
6444 vxge_hal_trace_log_mrpcim("hldev = 0x"VXGE_OS_STXFMT,
6445 (ptr_t)hldev);
6447 if (!(hldev->access_rights & VXGE_HAL_DEVICE_ACCESS_RIGHT_MRPCIM)) {
6454 hldev->mrpcim = (__hal_mrpcim_t *)
6455 vxge_os_malloc(hldev->header.pdev, sizeof(__hal_mrpcim_t));
6457 if (hldev->mrpcim == NULL) {
6463 vxge_os_memzero(hldev->mrpcim, sizeof(__hal_mrpcim_t));
6465 __hal_mrpcim_get_vpd_data(hldev);
6467 hldev->mrpcim->mrpcim_stats_block =
6468 __hal_blockpool_block_allocate(hldev, VXGE_OS_HOST_PAGE_SIZE);
6470 if (hldev->mrpcim->mrpcim_stats_block == NULL) {
6479 hldev->mrpcim->mrpcim_stats = (vxge_hal_mrpcim_stats_hw_info_t *)
6480 hldev->mrpcim->mrpcim_stats_block->memblock;
6482 vxge_os_memzero(hldev->mrpcim->mrpcim_stats,
6485 vxge_os_memzero(&hldev->mrpcim->mrpcim_stats_sav,
6488 status = __hal_mrpcim_mac_configure(hldev);
6496 status = __hal_mrpcim_lag_configure(hldev);
6504 val64 = vxge_os_pio_mem_read64(hldev->header.pdev,
6505 hldev->header.regh0,
6506 &hldev->mrpcim_reg->mdio_gen_cfg_port[0]);
6508 hldev->mrpcim->mdio_phy_prtad0 =
6511 val64 = vxge_os_pio_mem_read64(hldev->header.pdev,
6512 hldev->header.regh0,
6513 &hldev->mrpcim_reg->mdio_gen_cfg_port[1]);
6515 hldev->mrpcim->mdio_phy_prtad1 =
6518 val64 = vxge_os_pio_mem_read64(hldev->header.pdev,
6519 hldev->header.regh0,
6520 &hldev->mrpcim_reg->xgxs_static_cfg_port[0]);
6522 hldev->mrpcim->mdio_dte_prtad0 =
6525 val64 = vxge_os_pio_mem_read64(hldev->header.pdev,
6526 hldev->header.regh0,
6527 &hldev->mrpcim_reg->xgxs_static_cfg_port[1]);
6529 hldev->mrpcim->mdio_dte_prtad1 =
6532 vxge_os_pio_mem_write64(hldev->header.pdev,
6533 hldev->header.regh0,
6534 hldev->mrpcim->mrpcim_stats_block->dma_addr,
6535 &hldev->mrpcim_reg->mrpcim_stats_start_host_addr);
6537 val64 = vxge_os_pio_mem_read64(hldev->header.pdev,
6538 hldev->header.regh0,
6539 &hldev->mrpcim_reg->mrpcim_general_cfg2);
6543 hldev->first_vp_id);
6545 vxge_os_pio_mem_write64(hldev->header.pdev,
6546 hldev->header.regh0,
6548 &hldev->mrpcim_reg->mrpcim_general_cfg2);
6550 vxge_os_pio_mem_write64(hldev->header.pdev,
6551 hldev->header.regh0,
6553 &hldev->mrpcim_reg->rxmac_authorize_all_addr);
6555 vxge_os_pio_mem_write64(hldev->header.pdev,
6556 hldev->header.regh0,
6558 &hldev->mrpcim_reg->rxmac_authorize_all_vid);
6560 if (hldev->header.config.intr_mode ==
6563 val64 = vxge_os_pio_mem_read64(hldev->header.pdev,
6564 hldev->header.regh0,
6565 &hldev->mrpcim_reg->rdcrdtarb_cfg0);
6572 vxge_os_pio_mem_write64(hldev->header.pdev,
6573 hldev->header.regh0,
6575 &hldev->mrpcim_reg->rdcrdtarb_cfg0);
6578 (void) __hal_ifmsg_wmsg_post(hldev,
6579 hldev->first_vp_id,
6592 * @hldev: hal device.
6599 __hal_mrpcim_terminate(__hal_device_t *hldev)
6601 vxge_hal_device_h devh = (vxge_hal_device_h) hldev;
6604 vxge_assert((hldev != NULL) && (hldev->mrpcim != NULL));
6609 vxge_hal_trace_log_mrpcim("hldev = 0x"VXGE_OS_STXFMT,
6610 (ptr_t) hldev);
6612 if (hldev->mrpcim == NULL) {
6618 (void) __hal_ifmsg_wmsg_post(hldev,
6619 hldev->first_vp_id,
6624 if (hldev->mrpcim->mrpcim_stats_block != NULL) {
6626 hldev->mrpcim->mrpcim_stats_block);
6627 hldev->mrpcim->mrpcim_stats_block = NULL;
6630 vxge_os_free(hldev->header.pdev,
6631 hldev->mrpcim, sizeof(__hal_mrpcim_t));
6633 hldev->mrpcim = NULL;