Lines Matching defs:siba_read_4_sub
136 static uint32_t siba_read_4_sub(struct siba_dev_softc *, uint16_t);
819 return (siba_read_4_sub(sd, offset));
823 siba_read_4_sub(struct siba_dev_softc *sd, uint16_t offset)
1769 val = siba_read_4_sub(sd, SIBA_TGSLOW);
1791 siba_read_4_sub(sd, SIBA_TGSLOW);
1794 if (siba_read_4_sub(sd, SIBA_TGSHIGH) & SIBA_TGSHIGH_SERR)
1797 val = siba_read_4_sub(sd, SIBA_IAS);
1805 siba_read_4_sub(sd, SIBA_TGSLOW);
1809 siba_read_4_sub(sd, SIBA_TGSLOW);
1816 uint32_t rev = siba_read_4_sub(sd, SIBA_IDLOW) & SIBA_IDLOW_SSBREV;
1851 if (siba_read_4_sub(sd, SIBA_TGSLOW) & SIBA_TGSLOW_RESET)
1858 val = siba_read_4_sub(sd, SIBA_TGSLOW);
1868 val = siba_read_4_sub(sd, SIBA_TGSHIGH);
1880 siba_read_4_sub(sd, SIBA_TGSLOW);
1883 siba_read_4_sub(sd, SIBA_TGSLOW);
1900 tmp = siba_read_4_sub(psd, SIBA_IMCFGLO);
1912 siba_read_4_sub(sd, SIBA_PCICORE_BCAST_ADDR);
1915 siba_read_4_sub(sd, SIBA_PCICORE_BCAST_DATA);
1960 tmp = siba_read_4_sub(sd, SIBA_TPS);
1963 siba_read_4_sub(psd, SIBA_INTR_MASK) | (1 << tmp));
1975 return (siba_read_4_sub(spc->spc_dev, offset));
2534 return (siba_read_4_sub(gpiodev, SIBA_GPIOCTL));
2564 tmp = siba_read_4_sub(sd, SIBA_IMCFGLO) &