Lines Matching refs:RD4
63 #define RD4(slot, off) SDHCI_READ_4((slot)->bus, (slot), (off))
125 RD4(slot, SDHCI_DMA_ADDRESS), RD2(slot, SDHCI_HOST_VERSION));
129 RD4(slot, SDHCI_ARGUMENT), RD2(slot, SDHCI_TRANSFER_MODE));
131 RD4(slot, SDHCI_PRESENT_STATE), RD1(slot, SDHCI_HOST_CONTROL));
137 RD1(slot, SDHCI_TIMEOUT_CONTROL), RD4(slot, SDHCI_INT_STATUS));
139 RD4(slot, SDHCI_INT_ENABLE), RD4(slot, SDHCI_SIGNAL_ENABLE));
143 RD4(slot, SDHCI_CAPABILITIES), RD4(slot, SDHCI_MAX_CURRENT));
155 if (!(RD4(slot, SDHCI_PRESENT_STATE) &
362 data = RD4(slot, SDHCI_BUFFER);
377 data = RD4(slot, SDHCI_BUFFER);
432 while (RD4(slot, SDHCI_PRESENT_STATE) &
439 while (RD4(slot, SDHCI_PRESENT_STATE) &
462 if (RD4(slot, SDHCI_PRESENT_STATE) & SDHCI_CARD_PRESENT) {
533 caps = RD4(slot, SDHCI_CAPABILITIES);
798 state = RD4(slot, SDHCI_PRESENT_STATE);
838 state = RD4(slot, SDHCI_PRESENT_STATE);
902 uint32_t val = RD4(slot, SDHCI_RESPONSE + i * 4);
912 slot->curcmd->resp[0] = RD4(slot, SDHCI_RESPONSE);
1101 val = RD4(slot, SDHCI_PRESENT_STATE);
1261 err = RD4(slot, SDHCI_ACMD12_ERR);
1279 intmask = RD4(slot, SDHCI_INT_STATUS);