Lines Matching defs:loResource
207 * \param loResource: Pointer to low level TSDK resource requirement.
218 * structure in loResource, initiatorResource, targetResource
226 tiLoLevelResource_t *loResource,
233 TI_DBG6(("tiCOMGetResource: loResource %p\n", loResource));
235 if(loResource != agNULL)
237 tdsaLoLevelGetResource(tiRoot, loResource);
241 tdsaSharedMemCalculate(tiRoot, loResource, tdSharedMem);
253 if (loResource == agNULL)
255 TI_DBG1(("tiCOMGetResource: loResource is NULL, wrong\n"));
281 * \param loResource: Pointer to low level TSDK resource requirement.
296 tiLoLevelResource_t *loResource,
507 tdsaAllShared->loResource = *loResource;
523 tdsaAllShared->MaxNumLocks = loResource->loLevelOption.numOfQueuesPerPort;
525 tdsaAllShared->MaxNumOSLocks = loResource->loLevelOption.maxNumOSLocks;
583 tdsaAllShared->MaxNumLLLocks = loResource->loLevelOption.numOfQueuesPerPort - TD_MAX_LOCKS;
715 * \param loResource: Pointer to low level TSDK resource requirement.
729 tiLoLevelResource_t * loResource)
790 TI_DBG6(("tdsaLoLevelGetResource: loResource %p\n", loResource));
2075 maxNumOSLocks = loResource->loLevelOption.maxNumOSLocks;
2085 loResource->loLevelMem.mem[i].numElements = 0;
2086 loResource->loLevelMem.mem[i].totalLength = 0;
2087 loResource->loLevelMem.mem[i].singleElementLength = 0;
2088 loResource->loLevelMem.mem[i].alignment = 0;
2089 loResource->loLevelMem.mem[i].type = 0;
2090 loResource->loLevelMem.mem[i].reserved = 0;
2091 loResource->loLevelMem.mem[i].virtPtr = agNULL;
2092 loResource->loLevelMem.mem[i].osHandle = agNULL;
2093 loResource->loLevelMem.mem[i].physAddrUpper = 0;
2094 loResource->loLevelMem.mem[i].physAddrLower = 0;
2102 loResource->loLevelMem.mem[i].numElements = memRequirement.agMemory[i].numElements;
2103 loResource->loLevelMem.mem[i].totalLength = memRequirement.agMemory[i].totalLength;
2104 loResource->loLevelMem.mem[i].singleElementLength = memRequirement.agMemory[i].singleElementLength;
2105 loResource->loLevelMem.mem[i].alignment = memRequirement.agMemory[i].alignment;
2106 TI_DBG2(("tdsaLoLevelGetResource: index %d numElements %d totalLength %d singleElementLength %d alignment %d\n", i, loResource->loLevelMem.mem[i].numElements, loResource->loLevelMem.mem[i].totalLength, loResource->loLevelMem.mem[i].singleElementLength,loResource->loLevelMem.mem[i].alignment ));
2109 loResource->loLevelMem.mem[i].type = TI_DMA_MEM;
2115 loResource->loLevelMem.mem[i].type = TI_CACHED_MEM;
2120 loResource->loLevelMem.mem[i].type = TI_CACHED_DMA_MEM;
2131 loResource->loLevelMem.mem[i].numElements = dmMemRequirement.dmMemory[i-memRequirement.count].numElements;
2132 loResource->loLevelMem.mem[i].totalLength = dmMemRequirement.dmMemory[i-memRequirement.count].totalLength;
2133 loResource->loLevelMem.mem[i].singleElementLength = dmMemRequirement.dmMemory[i-memRequirement.count].singleElementLength;
2134 loResource->loLevelMem.mem[i].alignment = dmMemRequirement.dmMemory[i-memRequirement.count].alignment;
2135 TI_DBG2(("tdsaLoLevelGetResource: index %d numElements %d totalLength %d singleElementLength %d alignment %d\n", i, loResource->loLevelMem.mem[i].numElements, loResource->loLevelMem.mem[i].totalLength, loResource->loLevelMem.mem[i].singleElementLength,loResource->loLevelMem.mem[i].alignment ));
2138 loResource->loLevelMem.mem[i].type = TI_DMA_MEM;
2144 loResource->loLevelMem.mem[i].type = TI_CACHED_MEM;
2149 loResource->loLevelMem.mem[i].type = TI_CACHED_DMA_MEM;
2160 loResource->loLevelMem.mem[i].numElements = smMemRequirement.smMemory[i-memRequirement.count-dmMemRequirement.count].numElements;
2161 loResource->loLevelMem.mem[i].totalLength = smMemRequirement.smMemory[i-memRequirement.count-dmMemRequirement.count].totalLength;
2162 loResource->loLevelMem.mem[i].singleElementLength = smMemRequirement.smMemory[i-memRequirement.count-dmMemRequirement.count].singleElementLength;
2163 loResource->loLevelMem.mem[i].alignment = smMemRequirement.smMemory[i-memRequirement.count-dmMemRequirement.count].alignment;
2164 TI_DBG2(("tdsaLoLevelGetResource: index %d numElements %d totalLength %d singleElementLength %d alignment %d\n", i, loResource->loLevelMem.mem[i].numElements, loResource->loLevelMem.mem[i].totalLength, loResource->loLevelMem.mem[i].singleElementLength,loResource->loLevelMem.mem[i].alignment ));
2167 loResource->loLevelMem.mem[i].type = TI_DMA_MEM;
2173 loResource->loLevelMem.mem[i].type = TI_CACHED_MEM;
2178 loResource->loLevelMem.mem[i].type = TI_CACHED_DMA_MEM;
2184 loResource->loLevelOption.usecsPerTick = MIN(MIN(usecsPerTick, dmUsecsPerTick), smUsecsPerTick);
2185 loResource->loLevelOption.numOfQueuesPerPort = maxQueueSets + dmMaxNumLocks + smMaxNumLocks + TD_MAX_LOCKS + maxNumOSLocks;
2186 loResource->loLevelOption.mutexLockUsage = tiOneMutexLockPerQueue;
2188 loResource->loLevelMem.count = memRequirement.count + dmMemRequirement.count + smMemRequirement.count;
2190 loResource->loLevelOption.maxInterruptVectors = SwConfig.max_MSIX_InterruptVectors;
2191 loResource->loLevelOption.max_MSI_InterruptVectors = SwConfig.max_MSI_InterruptVectors;
2192 loResource->loLevelOption.flag = SwConfig.legacyInt_X;
2193 TI_DBG2(("tdsaLoLevelGetResource: asking maxInterruptVectors(MSIX) %d \n", loResource->loLevelOption.maxInterruptVectors));
2194 TI_DBG2(("tdsaLoLevelGetResource: asking max_MSI_InterruptVectors %d \n", loResource->loLevelOption.max_MSI_InterruptVectors));
2195 TI_DBG2(("tdsaLoLevelGetResource: asking flag - legacyInt_X %d \n", loResource->loLevelOption.flag));
2197 // TI_DBG6(("tdsaLoLevelGetResource: index %d numElements %d totalLength %d singleElementLength %d alignment %d\n",memRequirement.count, loResource->loLevelMem.mem[memRequirement.count].numElements,loResource->loLevelMem.mem[memRequirement.count].totalLength, loResource->loLevelMem.mem[memRequirement.count].singleElementLength,loResource->loLevelMem.mem[memRequirement.count].alignment ));
2198 TI_DBG6(("tdsaLoLevelGetResource: total memRequirement count %d TI_DMA_MEM\n", loResource->loLevelMem.count));
2204 loResource->loLevelMem.mem[i].numElements = 0;
2205 loResource->loLevelMem.mem[i].totalLength = 0;
2206 loResource->loLevelMem.mem[i].singleElementLength = 0;
2207 loResource->loLevelMem.mem[i].alignment = 0;
2208 loResource->loLevelMem.mem[i].type = 0;
2209 loResource->loLevelMem.mem[i].reserved = 0;
2210 loResource->loLevelMem.mem[i].virtPtr = agNULL;
2211 loResource->loLevelMem.mem[i].osHandle = agNULL;
2212 loResource->loLevelMem.mem[i].physAddrUpper = 0;
2213 loResource->loLevelMem.mem[i].physAddrLower = 0;
2221 loResource->loLevelMem.mem[i].numElements = memRequirement.agMemory[i].numElements;
2222 loResource->loLevelMem.mem[i].totalLength = memRequirement.agMemory[i].totalLength;
2223 loResource->loLevelMem.mem[i].singleElementLength = memRequirement.agMemory[i].singleElementLength;
2224 loResource->loLevelMem.mem[i].alignment = memRequirement.agMemory[i].alignment;
2225 TI_DBG2(("tdsaLoLevelGetResource: index %d numElements %d totalLength %d singleElementLength %d alignment %d\n", i, loResource->loLevelMem.mem[i].numElements, loResource->loLevelMem.mem[i].totalLength, loResource->loLevelMem.mem[i].singleElementLength,loResource->loLevelMem.mem[i].alignment ));
2228 loResource->loLevelMem.mem[i].type = TI_DMA_MEM;
2234 loResource->loLevelMem.mem[i].type = TI_CACHED_MEM;
2239 loResource->loLevelMem.mem[i].type = TI_CACHED_DMA_MEM;
2249 loResource->loLevelMem.mem[i].numElements = dmMemRequirement.dmMemory[i-memRequirement.count].numElements;
2250 loResource->loLevelMem.mem[i].totalLength = dmMemRequirement.dmMemory[i-memRequirement.count].totalLength;
2251 loResource->loLevelMem.mem[i].singleElementLength = dmMemRequirement.dmMemory[i-memRequirement.count].singleElementLength;
2252 loResource->loLevelMem.mem[i].alignment = dmMemRequirement.dmMemory[i-memRequirement.count].alignment;
2253 TI_DBG2(("tdsaLoLevelGetResource: index %d numElements %d totalLength %d singleElementLength %d alignment %d\n", i, loResource->loLevelMem.mem[i].numElements, loResource->loLevelMem.mem[i].totalLength, loResource->loLevelMem.mem[i].singleElementLength,loResource->loLevelMem.mem[i].alignment ));
2256 loResource->loLevelMem.mem[i].type = TI_DMA_MEM;
2262 loResource->loLevelMem.mem[i].type = TI_CACHED_MEM;
2267 loResource->loLevelMem.mem[i].type = TI_CACHED_DMA_MEM;
2275 loResource->loLevelOption.usecsPerTick = MIN(usecsPerTick, dmUsecsPerTick);
2276 loResource->loLevelOption.numOfQueuesPerPort = maxQueueSets + dmMaxNumLocks + TD_MAX_LOCKS + maxNumOSLocks;
2277 loResource->loLevelOption.mutexLockUsage = tiOneMutexLockPerQueue;
2279 loResource->loLevelMem.count = memRequirement.count + dmMemRequirement.count;
2281 loResource->loLevelOption.maxInterruptVectors = SwConfig.max_MSIX_InterruptVectors;
2282 loResource->loLevelOption.max_MSI_InterruptVectors = SwConfig.max_MSI_InterruptVectors;
2283 loResource->loLevelOption.flag = SwConfig.legacyInt_X;
2284 TI_DBG2(("tdsaLoLevelGetResource: asking maxInterruptVectors(MSIX) %d \n", loResource->loLevelOption.maxInterruptVectors));
2285 TI_DBG2(("tdsaLoLevelGetResource: asking max_MSI_InterruptVectors %d \n", loResource->loLevelOption.max_MSI_InterruptVectors));
2286 TI_DBG2(("tdsaLoLevelGetResource: asking flag - legacyInt_X %d \n", loResource->loLevelOption.flag));
2288 // TI_DBG6(("tdsaLoLevelGetResource: index %d numElements %d totalLength %d singleElementLength %d alignment %d\n",memRequirement.count, loResource->loLevelMem.mem[memRequirement.count].numElements,loResource->loLevelMem.mem[memRequirement.count].totalLength, loResource->loLevelMem.mem[memRequirement.count].singleElementLength,loResource->loLevelMem.mem[memRequirement.count].alignment ));
2289 TI_DBG6(("tdsaLoLevelGetResource: total memRequirement count %d TI_DMA_MEM\n", loResource->loLevelMem.count));
2295 loResource->loLevelMem.mem[i].numElements = 0;
2296 loResource->loLevelMem.mem[i].totalLength = 0;
2297 loResource->loLevelMem.mem[i].singleElementLength = 0;
2298 loResource->loLevelMem.mem[i].alignment = 0;
2299 loResource->loLevelMem.mem[i].type = 0;
2300 loResource->loLevelMem.mem[i].reserved = 0;
2301 loResource->loLevelMem.mem[i].virtPtr = agNULL;
2302 loResource->loLevelMem.mem[i].osHandle = agNULL;
2303 loResource->loLevelMem.mem[i].physAddrUpper = 0;
2304 loResource->loLevelMem.mem[i].physAddrLower = 0;
2312 loResource->loLevelMem.mem[i].numElements = memRequirement.agMemory[i].numElements;
2313 loResource->loLevelMem.mem[i].totalLength = memRequirement.agMemory[i].totalLength;
2314 loResource->loLevelMem.mem[i].singleElementLength = memRequirement.agMemory[i].singleElementLength;
2315 loResource->loLevelMem.mem[i].alignment = memRequirement.agMemory[i].alignment;
2316 TI_DBG6(("tdsaLoLevelGetResource: index %d numElements %d totalLength %d singleElementLength %d alignment %d\n", i, loResource->loLevelMem.mem[i].numElements, loResource->loLevelMem.mem[i].totalLength, loResource->loLevelMem.mem[i].singleElementLength,loResource->loLevelMem.mem[i].alignment ));
2319 loResource->loLevelMem.mem[i].type = TI_DMA_MEM;
2325 loResource->loLevelMem.mem[i].type = TI_CACHED_MEM;
2330 loResource->loLevelMem.mem[i].type = TI_CACHED_DMA_MEM;
2340 loResource->loLevelMem.mem[i].numElements = smMemRequirement.smMemory[i-memRequirement.count].numElements;
2341 loResource->loLevelMem.mem[i].totalLength = smMemRequirement.smMemory[i-memRequirement.count].totalLength;
2342 loResource->loLevelMem.mem[i].singleElementLength = smMemRequirement.smMemory[i-memRequirement.count].singleElementLength;
2343 loResource->loLevelMem.mem[i].alignment = smMemRequirement.smMemory[i-memRequirement.count].alignment;
2344 TI_DBG6(("tdsaLoLevelGetResource: index %d numElements %d totalLength %d singleElementLength %d alignment %d\n", i, loResource->loLevelMem.mem[i].numElements, loResource->loLevelMem.mem[i].totalLength, loResource->loLevelMem.mem[i].singleElementLength,loResource->loLevelMem.mem[i].alignment ));
2347 loResource->loLevelMem.mem[i].type = TI_DMA_MEM;
2353 loResource->loLevelMem.mem[i].type = TI_CACHED_MEM;
2358 loResource->loLevelMem.mem[i].type = TI_CACHED_DMA_MEM;
2366 loResource->loLevelOption.usecsPerTick = MIN(usecsPerTick, smUsecsPerTick);
2367 loResource->loLevelOption.numOfQueuesPerPort = maxQueueSets + smMaxNumLocks + TD_MAX_LOCKS + maxNumOSLocks;
2368 loResource->loLevelOption.mutexLockUsage = tiOneMutexLockPerQueue;
2370 loResource->loLevelMem.count = memRequirement.count + smMemRequirement.count;
2372 loResource->loLevelOption.maxInterruptVectors = SwConfig.max_MSIX_InterruptVectors;
2373 loResource->loLevelOption.max_MSI_InterruptVectors = SwConfig.max_MSI_InterruptVectors;
2374 loResource->loLevelOption.flag = SwConfig.legacyInt_X;
2375 TI_DBG2(("tdsaLoLevelGetResource: asking maxInterruptVectors(MSIX) %d \n", loResource->loLevelOption.maxInterruptVectors));
2376 TI_DBG2(("tdsaLoLevelGetResource: asking max_MSI_InterruptVectors %d \n", loResource->loLevelOption.max_MSI_InterruptVectors));
2377 TI_DBG2(("tdsaLoLevelGetResource: asking flag - legacyInt_X %d \n", loResource->loLevelOption.flag));
2379 // TI_DBG6(("tdsaLoLevelGetResource: index %d numElements %d totalLength %d singleElementLength %d alignment %d\n",memRequirement.count, loResource->loLevelMem.mem[memRequirement.count].numElements,loResource->loLevelMem.mem[memRequirement.count].totalLength, loResource->loLevelMem.mem[memRequirement.count].singleElementLength,loResource->loLevelMem.mem[memRequirement.count].alignment ));
2380 TI_DBG6(("tdsaLoLevelGetResource: total memRequirement count %d TI_DMA_MEM\n", loResource->loLevelMem.count));
2387 loResource->loLevelMem.mem[i].numElements = 0;
2388 loResource->loLevelMem.mem[i].totalLength = 0;
2389 loResource->loLevelMem.mem[i].singleElementLength = 0;
2390 loResource->loLevelMem.mem[i].alignment = 0;
2391 loResource->loLevelMem.mem[i].type = 0;
2392 loResource->loLevelMem.mem[i].reserved = 0;
2393 loResource->loLevelMem.mem[i].virtPtr = agNULL;
2394 loResource->loLevelMem.mem[i].osHandle = agNULL;
2395 loResource->loLevelMem.mem[i].physAddrUpper = 0;
2396 loResource->loLevelMem.mem[i].physAddrLower = 0;
2403 loResource->loLevelMem.mem[i].numElements = memRequirement.agMemory[i].numElements;
2404 loResource->loLevelMem.mem[i].totalLength = memRequirement.agMemory[i].totalLength;
2405 loResource->loLevelMem.mem[i].singleElementLength = memRequirement.agMemory[i].singleElementLength;
2406 loResource->loLevelMem.mem[i].alignment = memRequirement.agMemory[i].alignment;
2407 TI_DBG6(("tdsaLoLevelGetResource: index %d numElements %d totalLength %d singleElementLength %d alignment %d\n", i, loResource->loLevelMem.mem[i].numElements, loResource->loLevelMem.mem[i].totalLength, loResource->loLevelMem.mem[i].singleElementLength,loResource->loLevelMem.mem[i].alignment ));
2410 loResource->loLevelMem.mem[i].type = TI_DMA_MEM;
2416 loResource->loLevelMem.mem[i].type = TI_CACHED_MEM;
2421 loResource->loLevelMem.mem[i].type = TI_CACHED_DMA_MEM;
2429 loResource->loLevelOption.usecsPerTick = usecsPerTick;
2430 loResource->loLevelOption.numOfQueuesPerPort = maxQueueSets + TD_MAX_LOCKS + maxNumOSLocks;
2431 loResource->loLevelOption.mutexLockUsage = tiOneMutexLockPerQueue;
2433 loResource->loLevelMem.count = memRequirement.count;
2435 loResource->loLevelOption.maxInterruptVectors = SwConfig.max_MSIX_InterruptVectors;
2436 loResource->loLevelOption.max_MSI_InterruptVectors = SwConfig.max_MSI_InterruptVectors;
2437 loResource->loLevelOption.flag = SwConfig.legacyInt_X;
2438 TI_DBG2(("tdsaLoLevelGetResource: asking maxInterruptVectors(MSIX) %d \n", loResource->loLevelOption.maxInterruptVectors));
2439 TI_DBG2(("tdsaLoLevelGetResource: asking max_MSI_InterruptVectors %d \n", loResource->loLevelOption.max_MSI_InterruptVectors));
2440 TI_DBG2(("tdsaLoLevelGetResource: asking flag - legacyInt_X %d \n", loResource->loLevelOption.flag));
2442 TI_DBG6(("tdsaLoLevelGetResource: index %d numElements %d totalLength %d singleElementLength %d alignment %d\n",memRequirement.count, loResource->loLevelMem.mem[memRequirement.count].numElements,loResource->loLevelMem.mem[memRequirement.count].totalLength, loResource->loLevelMem.mem[memRequirement.count].singleElementLength,loResource->loLevelMem.mem[memRequirement.count].alignment ));
2474 tiLoLevelResource_t * loResource,