Lines Matching refs:u_int
146 u_int handle; /* this is the handle index */
176 u_int tail; /* next free entry for host */
178 u_int slots; /* CBR slots allocated */
194 u_int vflags; /* open and other flags */
202 u_int cid; /* index */
203 u_int cps; /* last ABR cps */
233 u_int flags; /* see below */
234 u_int revision; /* chip revision */
246 u_int rsq_last; /* last processed entry */
251 u_int tst_state; /* active TST and others */
252 u_int tst_jump[2]; /* address of the jumps */
253 u_int tst_base[2]; /* base address of TST */
254 u_int *tst_soft; /* soft TST */
257 u_int tst_free; /* free slots */
258 u_int tst_reserve; /* non-CBR reserve */
259 u_int bwrem; /* remaining bandwith */
270 u_int lbuf_max; /* maximum number */
281 u_int rawi; /* cell index into buffer */
288 u_int vccs_open; /* number of open channels */
301 u_int tx_nmaps; /* allocated maps */
302 u_int tx_maxmaps; /* maximum number */
307 u_int debug;
420 void patm_tx(struct patm_softc *, u_int, u_int);
423 void patm_tx_idle(struct patm_softc *, u_int);
448 patm_nor_read(struct patm_softc *sc, u_int reg)
457 patm_nor_write(struct patm_softc *sc, u_int reg, uint32_t val)
480 patm_sram_read(struct patm_softc *sc, u_int addr)
491 patm_sram_write(struct patm_softc *sc, u_int addr, uint32_t val)
499 patm_sram_write4(struct patm_softc *sc, u_int addr, uint32_t v0, uint32_t v1,
519 extern const u_int patm_rtables_size;
520 extern const u_int patm_rtables_ntab;