Lines Matching refs:CSR_WRITE_4

226 	CSR_WRITE_4(sc, JME_SMI, SMI_OP_READ | SMI_OP_EXECUTE |
257 CSR_WRITE_4(sc, JME_SMI, SMI_OP_WRITE | SMI_OP_EXECUTE |
371 CSR_WRITE_4(sc, JME_SMBINTF, reg | SMBINTF_RD | SMBINTF_CMD_TRIGGER);
546 CSR_WRITE_4(sc, JME_PAR0,
548 CSR_WRITE_4(sc, JME_PAR1, eaddr[5] << 8 | eaddr[4]);
616 CSR_WRITE_4(sc, JME_MSINUM_BASE + sizeof(uint32_t) * 0, map[0]);
617 CSR_WRITE_4(sc, JME_MSINUM_BASE + sizeof(uint32_t) * 1, map[1]);
618 CSR_WRITE_4(sc, JME_MSINUM_BASE + sizeof(uint32_t) * 2, map[2]);
619 CSR_WRITE_4(sc, JME_MSINUM_BASE + sizeof(uint32_t) * 3, map[3]);
1595 CSR_WRITE_4(sc, JME_GHC, CSR_READ_4(sc, JME_GHC) &
1599 CSR_WRITE_4(sc, JME_GPREG1,
1619 CSR_WRITE_4(sc, JME_PMCS, pmcs);
1620 CSR_WRITE_4(sc, JME_GPREG0, gpr);
1623 CSR_WRITE_4(sc, JME_GHC, CSR_READ_4(sc, JME_GHC) &
1931 CSR_WRITE_4(sc, JME_TXCSR, sc->jme_txcsr | TXCSR_TX_ENB |
2067 CSR_WRITE_4(sc, JME_RXMAC, reg);
2115 CSR_WRITE_4(sc, JME_GHC, GHC_RESET);
2117 CSR_WRITE_4(sc, JME_GHC, 0);
2137 CSR_WRITE_4(sc, JME_TXTRHD, CSR_READ_4(sc, JME_TXTRHD) &
2143 CSR_WRITE_4(sc, JME_TXTRHD, CSR_READ_4(sc, JME_TXTRHD) |
2178 CSR_WRITE_4(sc, JME_GPREG1, gpreg);
2192 CSR_WRITE_4(sc, JME_GHC, ghc);
2193 CSR_WRITE_4(sc, JME_RXMAC, rxmac);
2194 CSR_WRITE_4(sc, JME_TXMAC, txmac);
2195 CSR_WRITE_4(sc, JME_TXPFC, txpause);
2252 CSR_WRITE_4(sc, JME_INTR_MASK_CLR, JME_INTRS);
2305 CSR_WRITE_4(sc, JME_RXCSR, sc->jme_rxcsr);
2306 CSR_WRITE_4(sc, JME_TXCSR, sc->jme_txcsr);
2310 CSR_WRITE_4(sc, JME_TXDBA_HI, JME_ADDR_HI(paddr));
2311 CSR_WRITE_4(sc, JME_TXDBA_LO, JME_ADDR_LO(paddr));
2315 CSR_WRITE_4(sc, JME_RXDBA_HI, JME_ADDR_HI(paddr));
2316 CSR_WRITE_4(sc, JME_RXDBA_LO, JME_ADDR_LO(paddr));
2319 CSR_WRITE_4(sc, JME_RXCSR, sc->jme_rxcsr | RXCSR_RX_ENB |
2321 CSR_WRITE_4(sc, JME_TXCSR, sc->jme_txcsr | TXCSR_TX_ENB);
2324 CSR_WRITE_4(sc, JME_GHC,
2327 CSR_WRITE_4(sc, JME_GPREG1,
2337 CSR_WRITE_4(sc, JME_INTR_MASK_SET, JME_INTRS);
2354 CSR_WRITE_4(sc, JME_INTR_MASK_CLR, JME_INTRS);
2385 CSR_WRITE_4(sc, JME_INTR_STATUS, status);
2403 CSR_WRITE_4(sc, JME_RXCSR, sc->jme_rxcsr |
2419 CSR_WRITE_4(sc, JME_INTR_MASK_SET, JME_INTRS);
2718 CSR_WRITE_4(sc, JME_GHC, GHC_RESET);
2728 CSR_WRITE_4(sc, JME_GHC, GHC_RESET | GHC_TX_MAC_CLK_DIS);
2731 CSR_WRITE_4(sc, JME_GPREG1, gpreg | GPREG1_RX_MAC_CLK_DIS);
2734 CSR_WRITE_4(sc, JME_GHC, GHC_TX_MAC_CLK_DIS);
2738 CSR_WRITE_4(sc, JME_GHC, ghc & ~GHC_TX_MAC_CLK_DIS);
2740 CSR_WRITE_4(sc, JME_GPREG1, gpreg & ~GPREG1_RX_MAC_CLK_DIS);
2744 CSR_WRITE_4(sc, JME_GHC, GHC_TX_MAC_CLK_DIS);
2745 CSR_WRITE_4(sc, JME_GPREG1, gpreg | GPREG1_RX_MAC_CLK_DIS);
2747 CSR_WRITE_4(sc, JME_GHC, 0);
2817 CSR_WRITE_4(sc, JME_TXCSR, sc->jme_txcsr);
2820 CSR_WRITE_4(sc, JME_TXQDC, JME_TX_RING_CNT);
2824 CSR_WRITE_4(sc, JME_TXDBA_HI, JME_ADDR_HI(paddr));
2825 CSR_WRITE_4(sc, JME_TXDBA_LO, JME_ADDR_LO(paddr));
2831 CSR_WRITE_4(sc, JME_TXMAC, reg);
2866 CSR_WRITE_4(sc, JME_RXCSR, sc->jme_rxcsr);
2869 CSR_WRITE_4(sc, JME_RXQDC, JME_RX_RING_CNT);
2873 CSR_WRITE_4(sc, JME_RXDBA_HI, JME_ADDR_HI(paddr));
2874 CSR_WRITE_4(sc, JME_RXDBA_LO, JME_ADDR_LO(paddr));
2877 CSR_WRITE_4(sc, JME_RXMAC, 0);
2888 CSR_WRITE_4(sc, JME_PMCS, reg);
2899 CSR_WRITE_4(sc, JME_RXMAC, reg);
2924 CSR_WRITE_4(sc, JME_GPREG0, reg);
2932 CSR_WRITE_4(sc, JME_PCCTX, reg);
2939 CSR_WRITE_4(sc, JME_PCCRX0, reg);
2959 CSR_WRITE_4(sc, PCDRX_REG(0), reg);
2962 CSR_WRITE_4(sc, JME_PCDTX, reg);
2967 CSR_WRITE_4(sc, JME_SHBASE_ADDR_HI, JME_ADDR_HI(paddr));
2968 CSR_WRITE_4(sc, JME_SHBASE_ADDR_LO, JME_ADDR_LO(paddr));
2971 CSR_WRITE_4(sc, JME_TIMER1, 0);
2972 CSR_WRITE_4(sc, JME_TIMER2, 0);
2975 CSR_WRITE_4(sc, JME_TXTRHD,
2982 CSR_WRITE_4(sc, JME_RSSC, RSSC_DIS_RSS);
2985 CSR_WRITE_4(sc, JME_INTR_MASK_SET, JME_INTRS);
2986 CSR_WRITE_4(sc, JME_INTR_STATUS, 0xFFFFFFFF);
3024 CSR_WRITE_4(sc, JME_INTR_MASK_CLR, JME_INTRS);
3025 CSR_WRITE_4(sc, JME_INTR_STATUS, 0xFFFFFFFF);
3028 CSR_WRITE_4(sc, JME_SHBASE_ADDR_LO,
3081 CSR_WRITE_4(sc, JME_TXCSR, reg);
3101 CSR_WRITE_4(sc, JME_RXCSR, reg);
3236 CSR_WRITE_4(sc, JME_RXMAC, reg);
3264 CSR_WRITE_4(sc, JME_MAR0, 0xFFFFFFFF);
3265 CSR_WRITE_4(sc, JME_MAR1, 0xFFFFFFFF);
3266 CSR_WRITE_4(sc, JME_RXMAC, rxcfg);
3295 CSR_WRITE_4(sc, JME_MAR0, mchash[0]);
3296 CSR_WRITE_4(sc, JME_MAR1, mchash[1]);
3297 CSR_WRITE_4(sc, JME_RXMAC, rxcfg);
3310 CSR_WRITE_4(sc, JME_STATCSR, 0xFFFFFFFF);
3312 CSR_WRITE_4(sc, JME_STATCSR, 0);
3328 CSR_WRITE_4(sc, JME_STATCSR, 0xFFFFFFFF);
3379 CSR_WRITE_4(sc, JME_PHYPOWDN, reg);
3399 CSR_WRITE_4(sc, JME_PHYPOWDN, reg);