Lines Matching refs:reg_addr
597 * @reg_addr: 32 bit address of PHY register to read
600 s32 ixgbe_read_phy_reg_mdi(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type,
606 command = ((reg_addr << IXGBE_MSCA_NP_ADDR_SHIFT) |
636 command = ((reg_addr << IXGBE_MSCA_NP_ADDR_SHIFT) |
676 * @reg_addr: 32 bit address of PHY register to read
679 s32 ixgbe_read_phy_reg_generic(struct ixgbe_hw *hw, u32 reg_addr,
688 status = ixgbe_read_phy_reg_mdi(hw, reg_addr, device_type,
702 * @reg_addr: 32 bit PHY register to write
706 s32 ixgbe_write_phy_reg_mdi(struct ixgbe_hw *hw, u32 reg_addr,
715 command = ((reg_addr << IXGBE_MSCA_NP_ADDR_SHIFT) |
744 command = ((reg_addr << IXGBE_MSCA_NP_ADDR_SHIFT) |
776 * @reg_addr: 32 bit PHY register to write
780 s32 ixgbe_write_phy_reg_generic(struct ixgbe_hw *hw, u32 reg_addr,
789 status = ixgbe_write_phy_reg_mdi(hw, reg_addr, device_type,