Lines Matching refs:IO_VGA
52 #define MISC (IO_VGA + 0x02) /* misc output register */
53 #define ATC (IO_VGA + 0x00) /* attribute controller */
54 #define TSIDX (IO_VGA + 0x04) /* timing sequencer idx */
55 #define TSREG (IO_VGA + 0x05) /* timing sequencer data */
56 #define PIXMASK (IO_VGA + 0x06) /* pixel write mask */
57 #define PALRADR (IO_VGA + 0x07) /* palette read address */
58 #define PALWADR (IO_VGA + 0x08) /* palette write address */
59 #define PALDATA (IO_VGA + 0x09) /* palette data register */
60 #define GDCIDX (IO_VGA + 0x0E) /* graph data controller idx */
61 #define GDCREG (IO_VGA + 0x0F) /* graph data controller data */