drm2/radeon/r300.c

186 	radeon_ring_write(ring, PACKET0(R300_RE_SCISSORS_TL, 0));
188 	radeon_ring_write(ring, PACKET0(R300_RE_SCISSORS_BR, 0));
191 	radeon_ring_write(ring, PACKET0(R300_RB3D_DSTCACHE_CTLSTAT, 0));
193 	radeon_ring_write(ring, PACKET0(R300_RB3D_ZCACHE_CTLSTAT, 0));
196 	radeon_ring_write(ring, PACKET0(RADEON_WAIT_UNTIL, 0));
200 	radeon_ring_write(ring, PACKET0(RADEON_HOST_PATH_CNTL, 0));
203 	radeon_ring_write(ring, PACKET0(RADEON_HOST_PATH_CNTL, 0));
206 	radeon_ring_write(ring, PACKET0(rdev->fence_drv[fence->ring].scratch_reg, 0));
208 	radeon_ring_write(ring, PACKET0(RADEON_GEN_INT_STATUS, 0));
239 	radeon_ring_write(ring, PACKET0(RADEON_ISYNC_CNTL, 0));
245 	radeon_ring_write(ring, PACKET0(R300_GB_TILE_CONFIG, 0));
247 	radeon_ring_write(ring, PACKET0(RADEON_WAIT_UNTIL, 0));
251 	radeon_ring_write(ring, PACKET0(R300_DST_PIPE_CONFIG, 0));
253 	radeon_ring_write(ring, PACKET0(R300_GB_SELECT, 0));
255 	radeon_ring_write(ring, PACKET0(R300_GB_ENABLE, 0));
257 	radeon_ring_write(ring, PACKET0(R300_RB3D_DSTCACHE_CTLSTAT, 0));
259 	radeon_ring_write(ring, PACKET0(R300_RB3D_ZCACHE_CTLSTAT, 0));
261 	radeon_ring_write(ring, PACKET0(RADEON_WAIT_UNTIL, 0));
265 	radeon_ring_write(ring, PACKET0(R300_GB_AA_CONFIG, 0));
267 	radeon_ring_write(ring, PACKET0(R300_RB3D_DSTCACHE_CTLSTAT, 0));
269 	radeon_ring_write(ring, PACKET0(R300_RB3D_ZCACHE_CTLSTAT, 0));
271 	radeon_ring_write(ring, PACKET0(R300_GB_MSPOS0, 0));
281 	radeon_ring_write(ring, PACKET0(R300_GB_MSPOS1, 0));
290 	radeon_ring_write(ring, PACKET0(R300_GA_ENHANCE, 0));
292 	radeon_ring_write(ring, PACKET0(R300_GA_POLY_MODE, 0));
295 	radeon_ring_write(ring, PACKET0(R300_GA_ROUND_MODE, 0));