dev/ath/if_ath_tx_ht.c

417 	 * on highest rate in rate series (i.e. first rate) to determine
461  * It's the lowest of the four rate series 4ms frame length.
485  * Setup a 11n rate series structure
489  * This uses the rate series stuf from ath_tx_rate_fill_rcflags().
496     struct ath_buf *bf, HAL_11N_RATE_SERIES *series)
511 	 * If this is the first frame in an aggregate series,
523 	memset(series, 0, sizeof(HAL_11N_RATE_SERIES) * 4);
529 		series[i].Tries = rc[i].tries;
538 		series[i].ChSel = sc->sc_cur_txchainmask;
541 		 * Setup rate and TX power cap for this series.
543 		series[i].Rate = rt->info[rc[i].rix].rateCode;
544 		series[i].RateIndex = rc[i].rix;
545 		series[i].tx_power_cap = rc[i].tx_power_cap;
551 			series[i].RateFlags |= HAL_RATESERIES_RTS_CTS;
558 				series[i].RateFlags |= HAL_RATESERIES_2040;
561 				series[i].RateFlags |= HAL_RATESERIES_HALFGI;
564 				series[i].RateFlags |= HAL_RATESERIES_STBC;
572 			series[i].PktDuration =
574 				, series[i].Rate
575 				, HT_RC_2_STREAMS(series[i].Rate)
576 				, series[i].RateFlags & HAL_RATESERIES_2040
577 				, series[i].RateFlags & HAL_RATESERIES_HALFGI);
580 				series[i].Rate |=
582 			series[i].PktDuration = ath_hal_computetxtime(ah,
590 ath_rateseries_print(struct ath_softc *sc, HAL_11N_RATE_SERIES *series)
594 		device_printf(sc->sc_dev ,"series %d: rate %x; tries %d; "
597 		    series[i].Rate,
598 		    series[i].Tries,
599 		    series[i].PktDuration,
600 		    series[i].ChSel,
601 		    series[i].tx_power_cap,
602 		    series[i].RateFlags);
618 	HAL_11N_RATE_SERIES series[4];
626 	memset(&series, 0, sizeof(series));
628 	ath_rateseries_setup(sc, ni, bf, series);
631 	ath_rateseries_print(sc, series);
642 	    series,	/* 11n rate series */
643 	    4,		/* number of series */
673  * The rate series, descriptor setup, linking, etc is all done