Lines Matching refs:u_int
54 u_int amn_tx_try0_cnt;
55 u_int amn_tx_try1_cnt;
56 u_int amn_tx_try2_cnt;
57 u_int amn_tx_try3_cnt;
58 u_int amn_tx_failure_cnt;
60 u_int amn_success_threshold;
61 u_int amn_success;
62 u_int amn_recovery;
74 u_int amn_tx_try1; /* series 1 try count */
75 u_int amn_tx_try2; /* series 2 try count */
76 u_int amn_tx_try3; /* series 3 try count */