dev/aic7xxx/aic79xx_osm.c

710 		cpi->xport_specific.spi.ppr_options = SID_SPI_CLOCK_DT_ST
731 	struct	  ccb_trans_settings_spi *spi;
739 	spi = &cts->xport_specific.spi;
768 	if ((spi->valid & CTS_SPI_VALID_DISC) != 0) {
769 		if ((spi->flags & CTS_SPI_FLAGS_DISC_ENB) != 0)
782 	if ((spi->valid & CTS_SPI_VALID_BUS_WIDTH) != 0) {
784 				   &spi->bus_width, ROLE_UNKNOWN);
785 		ahd_set_width(ahd, &devinfo, spi->bus_width,
789 	if ((spi->valid & CTS_SPI_VALID_PPR_OPTIONS) == 0) {
791 			spi->ppr_options = tinfo->user.ppr_options;
793 			spi->ppr_options = tinfo->goal.ppr_options;
796 	if ((spi->valid & CTS_SPI_VALID_SYNC_OFFSET) == 0) {
798 			spi->sync_offset = tinfo->user.offset;
800 			spi->sync_offset = tinfo->goal.offset;
803 	if ((spi->valid & CTS_SPI_VALID_SYNC_RATE) == 0) {
805 			spi->sync_period = tinfo->user.period;
807 			spi->sync_period = tinfo->goal.period;
810 	if (((spi->valid & CTS_SPI_VALID_SYNC_RATE) != 0)
811 	 || ((spi->valid & CTS_SPI_VALID_SYNC_OFFSET) != 0)) {
816 		if (spi->bus_width != MSG_EXT_WDTR_BUS_16_BIT)
817 			spi->ppr_options &= ~MSG_EXT_PPR_DT_REQ;
820 			spi->ppr_options &= ~MSG_EXT_PPR_IU_REQ;
822 		ahd_find_syncrate(ahd, &spi->sync_period,
823 				  &spi->ppr_options, maxsync);
825 				    spi->sync_period, &spi->sync_offset,
826 				    spi->bus_width, ROLE_UNKNOWN);
829 		if (spi->sync_offset == 0) {
830 			spi->sync_period = 0;
831 			spi->ppr_options = 0;
834 		ahd_set_syncrate(ahd, &devinfo, spi->sync_period,
835 				 spi->sync_offset, spi->ppr_options,
847 	struct	ccb_trans_settings_spi *spi;
853 	spi = &cts->xport_specific.spi;
868 	spi->flags &= ~CTS_SPI_FLAGS_DISC_ENB;
871 			spi->flags |= CTS_SPI_FLAGS_DISC_ENB;
877 			spi->flags |= CTS_SPI_FLAGS_DISC_ENB;
885 	spi->sync_period = tinfo->period;
886 	spi->sync_offset = tinfo->offset;
887 	spi->bus_width = tinfo->width;
888 	spi->ppr_options = tinfo->ppr_options;
892 	spi->valid = CTS_SPI_VALID_SYNC_RATE
899 		spi->valid |= CTS_SPI_VALID_DISC;