Lines Matching defs:AE_READ_4
186 #define AE_READ_4(sc, reg) \
273 chiprev = (AE_READ_4(sc, AE_MASTER_REG) >> AE_MASTER_REVNUM_SHIFT) &
504 if ((AE_READ_4(sc, AE_MASTER_REG) & AE_MASTER_SOFT_RESET) == 0)
517 if (AE_READ_4(sc, AE_IDLE_REG) == 0)
639 val = AE_READ_4(sc, AE_MASTER_REG);
689 val = AE_READ_4(sc, AE_ISR_REG);
704 val = AE_READ_4(sc, AE_MASTER_REG);
733 val = AE_READ_4(sc, AE_MAC_REG);
824 val = AE_READ_4(sc, AE_MDIO_REG);
860 aereg = AE_READ_4(sc, AE_MDIO_REG);
928 val = AE_READ_4(sc, AE_SPICTL_REG);
953 val = AE_READ_4(sc, AE_VPD_CAP_REG);
962 *word = AE_READ_4(sc, AE_VPD_DATA_REG);
1036 eaddr[0] = AE_READ_4(sc, AE_EADDR0_REG);
1037 eaddr[1] = AE_READ_4(sc, AE_EADDR1_REG);
1377 val = AE_READ_4(sc, AE_PCIE_PHYMISC_REG);
1380 val = AE_READ_4(sc, AE_PCIE_DLL_TX_CTRL_REG);
1420 AE_READ_4(sc, AE_WOL_REG); /* Clear WOL status. */
1633 val = AE_READ_4(sc, AE_MAC_REG);
1651 val = AE_READ_4(sc, AE_MAC_REG);
1667 val = AE_READ_4(sc, AE_IDLE_REG);
1687 val = AE_READ_4(sc, AE_MAC_REG);
1703 val = AE_READ_4(sc, AE_IDLE_REG);
1721 val = AE_READ_4(sc, AE_MAC_REG);
1740 val = AE_READ_4(sc, AE_ISR_REG);
1766 val = AE_READ_4(sc, AE_ISR_REG); /* Read interrupt status. */
2026 val = AE_READ_4(sc, AE_MAC_REG);
2048 rxcfg = AE_READ_4(sc, AE_MAC_REG);
2198 if (AE_READ_4(sc, AE_IDLE_REG) == 0)