contrib/octeon-sdk/cvmx-tim-defs.h

61 	return CVMX_ADD_IO_SEG(0x0001180058000020ull);
64 #define CVMX_TIM_BIST_RESULT (CVMX_ADD_IO_SEG(0x0001180058000020ull))
72 	return CVMX_ADD_IO_SEG(0x00011800580000A0ull);
75 #define CVMX_TIM_DBG2 (CVMX_ADD_IO_SEG(0x00011800580000A0ull))
83 	return CVMX_ADD_IO_SEG(0x00011800580000A8ull);
86 #define CVMX_TIM_DBG3 (CVMX_ADD_IO_SEG(0x00011800580000A8ull))
94 	return CVMX_ADD_IO_SEG(0x0001180058000018ull);
97 #define CVMX_TIM_ECC_CFG (CVMX_ADD_IO_SEG(0x0001180058000018ull))
105 	return CVMX_ADD_IO_SEG(0x0001180058000010ull);
108 #define CVMX_TIM_FR_RN_TT (CVMX_ADD_IO_SEG(0x0001180058000010ull))
116 	return CVMX_ADD_IO_SEG(0x0001180058000080ull);
119 #define CVMX_TIM_GPIO_EN (CVMX_ADD_IO_SEG(0x0001180058000080ull))
127 	return CVMX_ADD_IO_SEG(0x0001180058000030ull);
130 #define CVMX_TIM_INT0 (CVMX_ADD_IO_SEG(0x0001180058000030ull))
138 	return CVMX_ADD_IO_SEG(0x0001180058000038ull);
141 #define CVMX_TIM_INT0_EN (CVMX_ADD_IO_SEG(0x0001180058000038ull))
149 	return CVMX_ADD_IO_SEG(0x0001180058000040ull);
152 #define CVMX_TIM_INT0_EVENT (CVMX_ADD_IO_SEG(0x0001180058000040ull))
160 	return CVMX_ADD_IO_SEG(0x0001180058000060ull);
163 #define CVMX_TIM_INT_ECCERR (CVMX_ADD_IO_SEG(0x0001180058000060ull))
171 	return CVMX_ADD_IO_SEG(0x0001180058000068ull);
174 #define CVMX_TIM_INT_ECCERR_EN (CVMX_ADD_IO_SEG(0x0001180058000068ull))
182 	return CVMX_ADD_IO_SEG(0x0001180058000070ull);
185 #define CVMX_TIM_INT_ECCERR_EVENT0 (CVMX_ADD_IO_SEG(0x0001180058000070ull))
193 	return CVMX_ADD_IO_SEG(0x0001180058000078ull);
196 #define CVMX_TIM_INT_ECCERR_EVENT1 (CVMX_ADD_IO_SEG(0x0001180058000078ull))
204 	return CVMX_ADD_IO_SEG(0x0001180058001100ull);
207 #define CVMX_TIM_MEM_DEBUG0 (CVMX_ADD_IO_SEG(0x0001180058001100ull))
215 	return CVMX_ADD_IO_SEG(0x0001180058001108ull);
218 #define CVMX_TIM_MEM_DEBUG1 (CVMX_ADD_IO_SEG(0x0001180058001108ull))
226 	return CVMX_ADD_IO_SEG(0x0001180058001110ull);
229 #define CVMX_TIM_MEM_DEBUG2 (CVMX_ADD_IO_SEG(0x0001180058001110ull))
237 	return CVMX_ADD_IO_SEG(0x0001180058001000ull);
240 #define CVMX_TIM_MEM_RING0 (CVMX_ADD_IO_SEG(0x0001180058001000ull))
248 	return CVMX_ADD_IO_SEG(0x0001180058001008ull);
251 #define CVMX_TIM_MEM_RING1 (CVMX_ADD_IO_SEG(0x0001180058001008ull))
259 	return CVMX_ADD_IO_SEG(0x0001180058000080ull);
262 #define CVMX_TIM_REG_BIST_RESULT (CVMX_ADD_IO_SEG(0x0001180058000080ull))
270 	return CVMX_ADD_IO_SEG(0x0001180058000088ull);
273 #define CVMX_TIM_REG_ERROR (CVMX_ADD_IO_SEG(0x0001180058000088ull))
275 #define CVMX_TIM_REG_FLAGS (CVMX_ADD_IO_SEG(0x0001180058000000ull))
282 	return CVMX_ADD_IO_SEG(0x0001180058000090ull);
285 #define CVMX_TIM_REG_INT_MASK (CVMX_ADD_IO_SEG(0x0001180058000090ull))
293 	return CVMX_ADD_IO_SEG(0x0001180058000008ull);
296 #define CVMX_TIM_REG_READ_IDX (CVMX_ADD_IO_SEG(0x0001180058000008ull))
304 	return CVMX_ADD_IO_SEG(0x0001180058002000ull) + ((offset) & 63) * 8;
307 #define CVMX_TIM_RINGX_CTL0(offset) (CVMX_ADD_IO_SEG(0x0001180058002000ull) + ((offset) & 63) * 8)
315 	return CVMX_ADD_IO_SEG(0x0001180058002400ull) + ((offset) & 63) * 8;
318 #define CVMX_TIM_RINGX_CTL1(offset) (CVMX_ADD_IO_SEG(0x0001180058002400ull) + ((offset) & 63) * 8)
326 	return CVMX_ADD_IO_SEG(0x0001180058002800ull) + ((offset) & 63) * 8;
329 #define CVMX_TIM_RINGX_CTL2(offset) (CVMX_ADD_IO_SEG(0x0001180058002800ull) + ((offset) & 63) * 8)
337 	return CVMX_ADD_IO_SEG(0x0001180058003000ull) + ((offset) & 63) * 8;
340 #define CVMX_TIM_RINGX_DBG0(offset) (CVMX_ADD_IO_SEG(0x0001180058003000ull) + ((offset) & 63) * 8)
348 	return CVMX_ADD_IO_SEG(0x0001180058001200ull) + ((offset) & 63) * 8;
351 #define CVMX_TIM_RINGX_DBG1(offset) (CVMX_ADD_IO_SEG(0x0001180058001200ull) + ((offset) & 63) * 8)