Lines Matching refs:CVMX_ADD_IO_SEG
61 return CVMX_ADD_IO_SEG(0x0001180013000118ull);
64 #define CVMX_EOI_BIST_CTL_STA (CVMX_ADD_IO_SEG(0x0001180013000118ull))
72 return CVMX_ADD_IO_SEG(0x0001180013000000ull);
75 #define CVMX_EOI_CTL_STA (CVMX_ADD_IO_SEG(0x0001180013000000ull))
83 return CVMX_ADD_IO_SEG(0x0001180013000020ull);
86 #define CVMX_EOI_DEF_STA0 (CVMX_ADD_IO_SEG(0x0001180013000020ull))
94 return CVMX_ADD_IO_SEG(0x0001180013000028ull);
97 #define CVMX_EOI_DEF_STA1 (CVMX_ADD_IO_SEG(0x0001180013000028ull))
105 return CVMX_ADD_IO_SEG(0x0001180013000030ull);
108 #define CVMX_EOI_DEF_STA2 (CVMX_ADD_IO_SEG(0x0001180013000030ull))
116 return CVMX_ADD_IO_SEG(0x0001180013000110ull);
119 #define CVMX_EOI_ECC_CTL (CVMX_ADD_IO_SEG(0x0001180013000110ull))
127 return CVMX_ADD_IO_SEG(0x0001180013000120ull);
130 #define CVMX_EOI_ENDOR_BISTR_CTL_STA (CVMX_ADD_IO_SEG(0x0001180013000120ull))
138 return CVMX_ADD_IO_SEG(0x0001180013000038ull);
141 #define CVMX_EOI_ENDOR_CLK_CTL (CVMX_ADD_IO_SEG(0x0001180013000038ull))
149 return CVMX_ADD_IO_SEG(0x0001180013000100ull);
152 #define CVMX_EOI_ENDOR_CTL (CVMX_ADD_IO_SEG(0x0001180013000100ull))
160 return CVMX_ADD_IO_SEG(0x0001180013000010ull);
163 #define CVMX_EOI_INT_ENA (CVMX_ADD_IO_SEG(0x0001180013000010ull))
171 return CVMX_ADD_IO_SEG(0x0001180013000008ull);
174 #define CVMX_EOI_INT_STA (CVMX_ADD_IO_SEG(0x0001180013000008ull))
182 return CVMX_ADD_IO_SEG(0x0001180013000018ull);
185 #define CVMX_EOI_IO_DRV (CVMX_ADD_IO_SEG(0x0001180013000018ull))
193 return CVMX_ADD_IO_SEG(0x0001180013000108ull);
196 #define CVMX_EOI_THROTTLE_CTL (CVMX_ADD_IO_SEG(0x0001180013000108ull))