xscale/ixp425/ixp425_npe.c

224 		uint32_t regAddr, uint32_t regSize,
227 		uint32_t regAddr, uint32_t regVal,
230 		uint32_t regAddr, uint32_t regValue, int verify);
781 	uint32_t regAddr;
833 	uint32_t regAddr;
899 	for (regAddr = 0;
900 	     regAddr < IX_NPEDL_TOTAL_NUM_PHYS_REG && error == 0;
901 	     regAddr++) {
903 		error = npe_physical_reg_write(sc, regAddr, 0, TRUE);
938 		    ixNpeDlEcsRegResetValues[i].regAddr,
945 	for (regAddr = IX_NPEDL_REG_OFFSET_EXCT;
946 	     regAddr <= IX_NPEDL_REG_OFFSET_AP3;
947 	     regAddr += sizeof(uint32_t))
948 		npe_reg_write(sc, regAddr, 0);
1215     uint32_t regAddr, uint32_t regSize,
1238 	/* make regAddr be the SRC and DEST operands (e.g. movX d0, d0) */
1239 	npeInstruction |= (regAddr << IX_NPEDL_OFFSET_INSTR_SRC) |
1240 	    (regAddr << IX_NPEDL_OFFSET_INSTR_DEST);
1247 		    __func__, regAddr, regSize, ctxtNum, error);
1260 npe_logical_reg_write(struct ixpnpe_softc *sc, uint32_t regAddr, uint32_t regVal,
1266 	    __func__, regAddr, regVal, regSize, ctxtNum);
1272 		error = npe_logical_reg_write(sc, regAddr,
1280 			     regAddr + sizeof(uint16_t),
1299 		npeInstruction |= (regAddr << IX_NPEDL_OFFSET_INSTR_DEST);
1317 		    "writing reg\n", __func__, regAddr, regVal, regSize,
1324 		error = npe_logical_reg_read(sc, regAddr, regSize, ctxtNum,
1341     uint32_t regAddr, uint32_t regValue, int verify)
1346 	 * Set REGMAP for context 0 to (regAddr >> 1) to choose which pair
1350 		   (regAddr >> IX_NPEDL_OFFSET_PHYS_REG_ADDR_REGMAP),
1353 	    /* regAddr = 0 or 4  */
1354 	    regAddr = (regAddr & IX_NPEDL_MASK_PHYS_REG_ADDR_LOGICAL_ADDR) *
1356 	    error = npe_logical_reg_write(sc, regAddr, regValue,