Lines Matching defs:write_4
96 write_4(struct ece_softc *sc, bus_size_t off, uint32_t val)
197 write_4(sc, PHY_CONTROL, PHY_RW_OK);
198 write_4(sc, PHY_CONTROL,
207 write_4(sc, PHY_CONTROL, PHY_RW_OK);
220 write_4(sc, PHY_CONTROL, PHY_RW_OK);
221 write_4(sc, PHY_CONTROL,
229 write_4(sc, PHY_CONTROL, PHY_RW_OK);
437 write_4(sc, INTERRUPT_MASK, 0x00000000);
440 write_4(sc, PORT_0_CONFIG, read_4(sc, PORT_0_CONFIG) & ~(PORT_DISABLE));
824 write_4(sc, MAC_PORT_0_CONFIG, mac_port_config);
829 write_4(sc, MAC_PORT_1_CONFIG, mac_port_config);
837 write_4(sc, TS_DESCRIPTOR_POINTER, sc->ring_paddr_tx);
838 write_4(sc, TS_DESCRIPTOR_BASE_ADDR, sc->ring_paddr_tx);
840 write_4(sc, FS_DESCRIPTOR_POINTER, sc->ring_paddr_rx);
841 write_4(sc, FS_DESCRIPTOR_BASE_ADDR, sc->ring_paddr_rx);
843 write_4(sc, FS_DMA_CONTROL, 1);
959 write_4(ec, ARL_TABLE_ACCESS_CONTROL_0, 0);
960 write_4(ec, ARL_TABLE_ACCESS_CONTROL_1, 0);
961 write_4(ec, ARL_TABLE_ACCESS_CONTROL_2, 0);
963 write_4(ec, ARL_TABLE_ACCESS_CONTROL_0, 0x1);
965 write_4(ec, ARL_TABLE_ACCESS_CONTROL_0, 0x2);
1005 write_4(ec, ARL_TABLE_ACCESS_CONTROL_0, 0);
1006 write_4(ec, ARL_TABLE_ACCESS_CONTROL_1, 0);
1007 write_4(ec, ARL_TABLE_ACCESS_CONTROL_2, 0);
1009 write_4(ec, ARL_TABLE_ACCESS_CONTROL_1, entry_val[0]);
1010 write_4(ec, ARL_TABLE_ACCESS_CONTROL_2, entry_val[1]);
1012 write_4(ec, ARL_TABLE_ACCESS_CONTROL_0, ARL_WRITE_COMMAND);
1116 write_4(sc, SWITCH_CONFIG, sw_config);
1125 write_4(sc, MAC_PORT_0_CONFIG, mac_port_config);
1134 write_4(sc, VLAN_PORT_PVID, val);
1136 write_4(sc, VLAN_PORT_PVID, val);
1138 write_4(sc, VLAN_PORT_PVID, val);
1140 write_4(sc, VLAN_PORT_PVID, val);
1143 write_4(sc, VLAN_PORT_PVID, val);
1145 write_4(sc, VLAN_PORT_PVID, val);
1184 write_4(sc, reg, val & (~(0xFFF << 0)));
1186 write_4(sc, reg, val|((vid & 0xFFF) << 0));
1189 write_4(sc, reg, val & (~(0xFFF << 12)));
1191 write_4(sc, reg, val|((vid & 0xFFF) << 12));
1216 write_4(sc, VLAN_MEMBER_PORT_MAP, val);
1218 write_4(sc, VLAN_MEMBER_PORT_MAP, val | ((group & 0x7) << shift));
1231 write_4(sc, VLAN_TAG_PORT_MAP, val);
1233 write_4(sc, VLAN_TAG_PORT_MAP, val | ((tag & 0x7) << shift));
1248 write_4(sc, CPU_PORT_CONFIG, cpu_port_config);
1264 write_4(sc, INTERRUPT_MASK, 0xffff1fff);
1267 write_4(sc, INTERRUPT_STATUS, 0x00001FFF);
1269 write_4(sc, TS_DMA_CONTROL, 0);
1270 write_4(sc, FS_DMA_CONTROL, 0);
1450 write_4(sc, FS_DMA_CONTROL, 0);
1469 write_4(sc, INTERRUPT_STATUS, stat);
1524 write_4(sc, FS_DMA_CONTROL, 0);
1537 write_4(sc, FS_DMA_CONTROL, 0);
1541 write_4(sc, FS_DMA_CONTROL, 1);
1564 write_4(sc, SWITCH_CONFIG, 0x007AA7A1);
1565 write_4(sc, MAC_PORT_0_CONFIG, 0x00423D00);
1566 write_4(sc, MAC_PORT_1_CONFIG, 0x00423D80);
1567 write_4(sc, CPU_PORT_CONFIG, 0x004C0000);
1575 write_4(sc, MAC_PORT_0_CONFIG, mac_port_config);
1580 write_4(sc, CPU_PORT_CONFIG, cpu_port_config);
1592 write_4(sc, FS_DMA_CONTROL, 1);
1729 write_4(sc, TS_DMA_CONTROL, 1);
1769 write_4(sc, TS_DMA_CONTROL, 0);
1770 write_4(sc, FS_DMA_CONTROL, 0);
1780 write_4(sc, MAC_PORT_0_CONFIG, mac_port_config);
1785 write_4(sc, MAC_PORT_1_CONFIG, mac_port_config);
1788 write_4(sc, INTERRUPT_MASK, 0x00001FFF);
1791 write_4(sc, INTERRUPT_STATUS, 0x00001FFF);
1793 write_4(sc, SWITCH_CONFIG, initial_switch_config);
1794 write_4(sc, CPU_PORT_CONFIG, initial_cpu_config);
1795 write_4(sc, MAC_PORT_0_CONFIG, initial_port0_config);
1796 write_4(sc, MAC_PORT_1_CONFIG, initial_port1_config);
1809 write_4(sc, PORT_0_CONFIG,
1811 write_4(sc, INTERRUPT_MASK, 0x00000000);
1812 write_4(sc, FS_DMA_CONTROL, 1);
1830 write_4(sc, MAC_PORT_0_CONFIG, mac_port_config);