Lines Matching refs:mcp

92 ia32_get_fpcontext(struct thread *td, struct ia32_mcontext *mcp,
103 mcp->mc_ownedfp = fpugetregs(td);
104 bcopy(get_pcb_user_save_td(td), &mcp->mc_fpstate[0],
105 sizeof(mcp->mc_fpstate));
106 mcp->mc_fpformat = fpuformat();
115 mcp->mc_flags |= _MC_IA32_HASFPXSTATE;
116 mcp->mc_xfpustate_len = len;
121 ia32_set_fpcontext(struct thread *td, struct ia32_mcontext *mcp,
126 if (mcp->mc_fpformat == _MC_FPFMT_NODEV)
128 else if (mcp->mc_fpformat != _MC_FPFMT_XMM)
130 else if (mcp->mc_ownedfp == _MC_FPOWNED_NONE) {
134 } else if (mcp->mc_ownedfp == _MC_FPOWNED_FPU ||
135 mcp->mc_ownedfp == _MC_FPOWNED_PCB) {
136 error = fpusetregs(td, (struct savefpu *)&mcp->mc_fpstate,
147 ia32_get_mcontext(struct thread *td, struct ia32_mcontext *mcp, int flags)
156 mcp->mc_onstack = sigonstack(tp->tf_rsp);
159 mcp->mc_gs = tp->tf_gs;
160 mcp->mc_fs = tp->tf_fs;
161 mcp->mc_es = tp->tf_es;
162 mcp->mc_ds = tp->tf_ds;
163 mcp->mc_edi = tp->tf_rdi;
164 mcp->mc_esi = tp->tf_rsi;
165 mcp->mc_ebp = tp->tf_rbp;
166 mcp->mc_isp = tp->tf_rsp;
167 mcp->mc_eflags = tp->tf_rflags;
169 mcp->mc_eax = 0;
170 mcp->mc_edx = 0;
171 mcp->mc_eflags &= ~PSL_C;
173 mcp->mc_eax = tp->tf_rax;
174 mcp->mc_edx = tp->tf_rdx;
176 mcp->mc_ebx = tp->tf_rbx;
177 mcp->mc_ecx = tp->tf_rcx;
178 mcp->mc_eip = tp->tf_rip;
179 mcp->mc_cs = tp->tf_cs;
180 mcp->mc_esp = tp->tf_rsp;
181 mcp->mc_ss = tp->tf_ss;
182 mcp->mc_len = sizeof(*mcp);
183 mcp->mc_flags = tp->tf_flags;
184 ia32_get_fpcontext(td, mcp, NULL, 0);
185 mcp->mc_fsbase = pcb->pcb_fsbase;
186 mcp->mc_gsbase = pcb->pcb_gsbase;
187 mcp->mc_xfpustate = 0;
188 mcp->mc_xfpustate_len = 0;
189 bzero(mcp->mc_spare2, sizeof(mcp->mc_spare2));
200 ia32_set_mcontext(struct thread *td, struct ia32_mcontext *mcp)
208 if (mcp->mc_len != sizeof(*mcp))
210 rflags = (mcp->mc_eflags & PSL_USERCHANGE) |
212 if (mcp->mc_flags & _MC_IA32_HASFPXSTATE) {
213 if (mcp->mc_xfpustate_len > cpu_max_ext_state_size -
216 xfpustate = __builtin_alloca(mcp->mc_xfpustate_len);
217 ret = copyin(PTRIN(mcp->mc_xfpustate), xfpustate,
218 mcp->mc_xfpustate_len);
223 ret = ia32_set_fpcontext(td, mcp, xfpustate, mcp->mc_xfpustate_len);
226 tp->tf_gs = mcp->mc_gs;
227 tp->tf_fs = mcp->mc_fs;
228 tp->tf_es = mcp->mc_es;
229 tp->tf_ds = mcp->mc_ds;
231 tp->tf_rdi = mcp->mc_edi;
232 tp->tf_rsi = mcp->mc_esi;
233 tp->tf_rbp = mcp->mc_ebp;
234 tp->tf_rbx = mcp->mc_ebx;
235 tp->tf_rdx = mcp->mc_edx;
236 tp->tf_rcx = mcp->mc_ecx;
237 tp->tf_rax = mcp->mc_eax;
239 tp->tf_rip = mcp->mc_eip;
241 tp->tf_rsp = mcp->mc_esp;
242 tp->tf_ss = mcp->mc_ss;