Lines Matching refs:SRCREG
70 #define SRCREG a1
74 #define SRCREG a0
91 sltu t0,SRCREG,DSTREG # t0 == SRCREG < DSTREG
110 andi t0,SRCREG,(SZREG-1) # get last bits of src
119 PTR_ADDU a3,SRCREG,t0 # run fast loop up to this addr
120 sltu AT,SRCREG,a3 # any work to do?
128 REG_L t3,(0*SZREG)(SRCREG)
129 REG_L v1,(1*SZREG)(SRCREG)
130 REG_L t0,(2*SZREG)(SRCREG)
131 REG_L t1,(3*SZREG)(SRCREG)
132 PTR_ADDU SRCREG,SZREG*8
137 REG_L t1,(-1*SZREG)(SRCREG)
138 REG_L t0,(-2*SZREG)(SRCREG)
139 REG_L v1,(-3*SZREG)(SRCREG)
140 REG_L t3,(-4*SZREG)(SRCREG)
145 bne SRCREG,a3,1b
155 PTR_ADDU t0,SRCREG,t2 # stop at t0
158 REG_L t3,0(SRCREG)
159 PTR_ADDU SRCREG,SZREG
161 bne SRCREG,t0,1b
168 lb t3,0(SRCREG)
169 PTR_ADDU SRCREG,1
188 PTR_ADDU a3,SRCREG,a3 # stop point
191 REG_LHI t3,0(SRCREG)
192 REG_LLO t3,SZREG-1(SRCREG)
193 PTR_ADDI SRCREG,SZREG
195 bne SRCREG,a3,1b
202 PTR_ADDU SRCREG,SIZEREG
206 andi t0,SRCREG,SZREG-1 # get last 3 bits of src
216 PTR_SUBU a3,SRCREG,t0
222 REG_L t3,(-4*SZREG)(SRCREG)
223 REG_L v1,(-3*SZREG)(SRCREG)
224 REG_L t0,(-2*SZREG)(SRCREG)
225 REG_L t1,(-1*SZREG)(SRCREG)
226 PTR_SUBU SRCREG,8*SZREG
231 REG_L t1,(3*SZREG)(SRCREG)
232 REG_L t0,(2*SZREG)(SRCREG)
233 REG_L v1,(1*SZREG)(SRCREG)
234 REG_L t3,(0*SZREG)(SRCREG)
239 bne SRCREG,a3,1b
249 PTR_SUBU t0,SRCREG,t2 # stop at t0
252 REG_L t3,-SZREG(SRCREG)
253 PTR_SUBU SRCREG,SZREG
255 bne SRCREG,t0,1b
262 lb t3,-1(SRCREG)
263 PTR_SUBU SRCREG,1
282 PTR_SUBU a3,SRCREG,a3 # stop point
285 REG_LHI t3,-SZREG(SRCREG)
286 REG_LLO t3,-1(SRCREG)
287 PTR_SUBU SRCREG,SZREG
289 bne SRCREG,a3,1b