Lines Matching refs:Insn

104                                         unsigned Insn,
109 unsigned Insn,
114 unsigned Insn,
119 unsigned Insn,
124 unsigned Insn,
129 unsigned Insn,
134 unsigned Insn,
139 unsigned Insn,
144 unsigned Insn,
149 unsigned Insn,
154 unsigned Insn,
159 unsigned Insn,
164 unsigned Insn,
169 unsigned Insn,
174 unsigned Insn,
179 unsigned Insn,
184 unsigned Insn,
189 unsigned Insn,
194 unsigned Insn,
199 unsigned Insn,
204 unsigned Insn,
252 Decode2OpInstruction(unsigned Insn, unsigned &Op1, unsigned &Op2) {
253 unsigned Combined = fieldFromInstruction(Insn, 6, 5);
256 if (fieldFromInstruction(Insn, 5, 1)) {
264 Op1 = (Op1High << 2) | fieldFromInstruction(Insn, 2, 2);
265 Op2 = (Op2High << 2) | fieldFromInstruction(Insn, 0, 2);
270 Decode3OpInstruction(unsigned Insn, unsigned &Op1, unsigned &Op2,
272 unsigned Combined = fieldFromInstruction(Insn, 6, 5);
279 Op1 = (Op1High << 2) | fieldFromInstruction(Insn, 4, 2);
280 Op2 = (Op2High << 2) | fieldFromInstruction(Insn, 2, 2);
281 Op3 = (Op3High << 2) | fieldFromInstruction(Insn, 0, 2);
286 Decode2OpInstructionFail(MCInst &Inst, unsigned Insn, uint64_t Address,
289 unsigned Opcode = fieldFromInstruction(Insn, 11, 5);
293 return Decode2RUSInstruction(Inst, Insn, Address, Decoder);
296 return Decode2RUSInstruction(Inst, Insn, Address, Decoder);
299 return Decode3RInstruction(Inst, Insn, Address, Decoder);
302 return Decode3RInstruction(Inst, Insn, Address, Decoder);
305 return Decode3RInstruction(Inst, Insn, Address, Decoder);
308 return Decode3RInstruction(Inst, Insn, Address, Decoder);
311 return Decode3RInstruction(Inst, Insn, Address, Decoder);
314 return Decode3RInstruction(Inst, Insn, Address, Decoder);
317 return Decode3RInstruction(Inst, Insn, Address, Decoder);
320 return Decode3RInstruction(Inst, Insn, Address, Decoder);
323 return Decode3RInstruction(Inst, Insn, Address, Decoder);
326 return Decode3RInstruction(Inst, Insn, Address, Decoder);
329 return Decode2RUSInstruction(Inst, Insn, Address, Decoder);
332 return Decode2RUSInstruction(Inst, Insn, Address, Decoder);
335 return Decode2RUSBitpInstruction(Inst, Insn, Address, Decoder);
338 return Decode2RUSBitpInstruction(Inst, Insn, Address, Decoder);
341 return Decode2RUSInstruction(Inst, Insn, Address, Decoder);
344 return Decode3RImmInstruction(Inst, Insn, Address, Decoder);
347 return Decode3RInstruction(Inst, Insn, Address, Decoder);
350 return Decode3RInstruction(Inst, Insn, Address, Decoder);
356 Decode2RInstruction(MCInst &Inst, unsigned Insn, uint64_t Address,
359 DecodeStatus S = Decode2OpInstruction(Insn, Op1, Op2);
361 return Decode2OpInstructionFail(Inst, Insn, Address, Decoder);
369 Decode2RImmInstruction(MCInst &Inst, unsigned Insn, uint64_t Address,
372 DecodeStatus S = Decode2OpInstruction(Insn, Op1, Op2);
374 return Decode2OpInstructionFail(Inst, Insn, Address, Decoder);
382 DecodeR2RInstruction(MCInst &Inst, unsigned Insn, uint64_t Address,
385 DecodeStatus S = Decode2OpInstruction(Insn, Op2, Op1);
387 return Decode2OpInstructionFail(Inst, Insn, Address, Decoder);
395 Decode2RSrcDstInstruction(MCInst &Inst, unsigned Insn, uint64_t Address,
398 DecodeStatus S = Decode2OpInstruction(Insn, Op1, Op2);
400 return Decode2OpInstructionFail(Inst, Insn, Address, Decoder);
409 DecodeRUSInstruction(MCInst &Inst, unsigned Insn, uint64_t Address,
412 DecodeStatus S = Decode2OpInstruction(Insn, Op1, Op2);
414 return Decode2OpInstructionFail(Inst, Insn, Address, Decoder);
422 DecodeRUSBitpInstruction(MCInst &Inst, unsigned Insn, uint64_t Address,
425 DecodeStatus S = Decode2OpInstruction(Insn, Op1, Op2);
427 return Decode2OpInstructionFail(Inst, Insn, Address, Decoder);
435 DecodeRUSSrcDstBitpInstruction(MCInst &Inst, unsigned Insn, uint64_t Address,
438 DecodeStatus S = Decode2OpInstruction(Insn, Op1, Op2);
440 return Decode2OpInstructionFail(Inst, Insn, Address, Decoder);
449 DecodeL2OpInstructionFail(MCInst &Inst, unsigned Insn, uint64_t Address,
452 unsigned Opcode = fieldFromInstruction(Insn, 16, 4) |
453 fieldFromInstruction(Insn, 27, 5) << 4;
457 return DecodeL3RInstruction(Inst, Insn, Address, Decoder);
460 return DecodeL3RInstruction(Inst, Insn, Address, Decoder);
463 return DecodeL3RInstruction(Inst, Insn, Address, Decoder);
466 return DecodeL3RInstruction(Inst, Insn, Address, Decoder);
469 return DecodeL3RInstruction(Inst, Insn, Address, Decoder);
472 return DecodeL3RInstruction(Inst, Insn, Address, Decoder);
475 return DecodeL3RInstruction(Inst, Insn, Address, Decoder);
478 return DecodeL3RInstruction(Inst, Insn, Address, Decoder);
481 return DecodeL3RInstruction(Inst, Insn, Address, Decoder);
484 return DecodeL3RInstruction(Inst, Insn, Address, Decoder);
487 return DecodeL3RInstruction(Inst, Insn, Address, Decoder);
490 return DecodeL3RInstruction(Inst, Insn, Address, Decoder);
493 return DecodeL2RUSBitpInstruction(Inst, Insn, Address, Decoder);
496 return DecodeL2RUSBitpInstruction(Inst, Insn, Address, Decoder);
499 return DecodeL2RUSBitpInstruction(Inst, Insn, Address, Decoder);
502 return DecodeL2RUSInstruction(Inst, Insn, Address, Decoder);
505 return DecodeL2RUSInstruction(Inst, Insn, Address, Decoder);
508 return DecodeL3RSrcDstInstruction(Inst, Insn, Address, Decoder);
511 return DecodeL3RInstruction(Inst, Insn, Address, Decoder);
514 return DecodeL3RInstruction(Inst, Insn, Address, Decoder);
520 DecodeL2RInstruction(MCInst &Inst, unsigned Insn, uint64_t Address,
523 DecodeStatus S = Decode2OpInstruction(fieldFromInstruction(Insn, 0, 16),
526 return DecodeL2OpInstructionFail(Inst, Insn, Address, Decoder);
534 DecodeLR2RInstruction(MCInst &Inst, unsigned Insn, uint64_t Address,
537 DecodeStatus S = Decode2OpInstruction(fieldFromInstruction(Insn, 0, 16),
540 return DecodeL2OpInstructionFail(Inst, Insn, Address, Decoder);
548 Decode3RInstruction(MCInst &Inst, unsigned Insn, uint64_t Address,
551 DecodeStatus S = Decode3OpInstruction(Insn, Op1, Op2, Op3);
561 Decode3RImmInstruction(MCInst &Inst, unsigned Insn, uint64_t Address,
564 DecodeStatus S = Decode3OpInstruction(Insn, Op1, Op2, Op3);
574 Decode2RUSInstruction(MCInst &Inst, unsigned Insn, uint64_t Address,
577 DecodeStatus S = Decode3OpInstruction(Insn, Op1, Op2, Op3);
587 Decode2RUSBitpInstruction(MCInst &Inst, unsigned Insn, uint64_t Address,
590 DecodeStatus S = Decode3OpInstruction(Insn, Op1, Op2, Op3);
600 DecodeL3RInstruction(MCInst &Inst, unsigned Insn, uint64_t Address,
604 Decode3OpInstruction(fieldFromInstruction(Insn, 0, 16), Op1, Op2, Op3);
614 DecodeL3RSrcDstInstruction(MCInst &Inst, unsigned Insn, uint64_t Address,
618 Decode3OpInstruction(fieldFromInstruction(Insn, 0, 16), Op1, Op2, Op3);
629 DecodeL2RUSInstruction(MCInst &Inst, unsigned Insn, uint64_t Address,
633 Decode3OpInstruction(fieldFromInstruction(Insn, 0, 16), Op1, Op2, Op3);
643 DecodeL2RUSBitpInstruction(MCInst &Inst, unsigned Insn, uint64_t Address,
647 Decode3OpInstruction(fieldFromInstruction(Insn, 0, 16), Op1, Op2, Op3);
657 DecodeL6RInstruction(MCInst &Inst, unsigned Insn, uint64_t Address,
661 Decode3OpInstruction(fieldFromInstruction(Insn, 0, 16), Op1, Op2, Op3);
664 S = Decode3OpInstruction(fieldFromInstruction(Insn, 16, 16), Op4, Op5, Op6);
677 DecodeL5RInstructionFail(MCInst &Inst, unsigned Insn, uint64_t Address,
681 unsigned Opcode = fieldFromInstruction(Insn, 27, 5);
685 return DecodeL6RInstruction(Inst, Insn, Address, Decoder);
691 DecodeL5RInstruction(MCInst &Inst, unsigned Insn, uint64_t Address,
695 Decode3OpInstruction(fieldFromInstruction(Insn, 0, 16), Op1, Op2, Op3);
697 return DecodeL5RInstructionFail(Inst, Insn, Address, Decoder);
698 S = Decode2OpInstruction(fieldFromInstruction(Insn, 16, 16), Op4, Op5);
700 return DecodeL5RInstructionFail(Inst, Insn, Address, Decoder);
711 DecodeL4RSrcDstInstruction(MCInst &Inst, unsigned Insn, uint64_t Address,
714 unsigned Op4 = fieldFromInstruction(Insn, 16, 4);
716 Decode3OpInstruction(fieldFromInstruction(Insn, 0, 16), Op1, Op2, Op3);
730 DecodeL4RSrcDstSrcDstInstruction(MCInst &Inst, unsigned Insn, uint64_t Address,
733 unsigned Op4 = fieldFromInstruction(Insn, 16, 4);
735 Decode3OpInstruction(fieldFromInstruction(Insn, 0, 16), Op1, Op2, Op3);