Lines Matching defs:MemOperand
134 void EmitVEXOpcodePrefix(uint64_t TSFlags, unsigned &CurByte, int MemOperand,
139 int MemOperand, const MCInst &MI,
142 void EmitOpcodePrefix(uint64_t TSFlags, unsigned &CurByte, int MemOperand,
530 int MemOperand, const MCInst &MI,
704 if (X86II::isX86_64ExtendedReg(MI.getOperand(MemOperand +
707 if (X86II::isX86_64ExtendedReg(MI.getOperand(MemOperand +
710 if (HasEVEX && X86II::is32ExtendedReg(MI.getOperand(MemOperand +
762 MI.getOperand(MemOperand+X86::AddrBaseReg).getReg()))
765 MI.getOperand(MemOperand+X86::AddrIndexReg).getReg()))
767 if (HasEVEX && X86II::is32ExtendedReg(MI.getOperand(MemOperand +
797 MI.getOperand(MemOperand+X86::AddrBaseReg).getReg()))
800 MI.getOperand(MemOperand+X86::AddrIndexReg).getReg()))
891 EmitSegmentOverridePrefix(TSFlags, CurByte, MemOperand, MI, OS);
1043 unsigned &CurByte, int MemOperand,
1050 if (MemOperand != -1) { // If the instruction has a memory operand.
1051 switch (MI.getOperand(MemOperand+X86::AddrSegmentReg).getReg()) {
1074 /// MemOperand is the operand # of the start of a memory operand if present. If
1077 int MemOperand, const MCInst &MI,
1086 EmitSegmentOverridePrefix(TSFlags, CurByte, MemOperand, MI, OS);
1096 } else if (MemOperand == -1) {
1099 assert(!Is16BitMemOperand(MI, MemOperand));
1100 need_address_override = Is32BitMemOperand(MI, MemOperand);
1102 assert(!Is64BitMemOperand(MI, MemOperand));
1103 need_address_override = Is16BitMemOperand(MI, MemOperand);