Lines Matching refs:Operands

317   parseRegister(SmallVectorImpl<MCParsedAsmOperand*> &Operands,
325 parseAddress(SmallVectorImpl<MCParsedAsmOperand*> &Operands,
329 bool parseOperand(SmallVectorImpl<MCParsedAsmOperand*> &Operands,
348 SmallVectorImpl<MCParsedAsmOperand*> &Operands)
352 SmallVectorImpl<MCParsedAsmOperand*> &Operands,
358 parseGR32(SmallVectorImpl<MCParsedAsmOperand*> &Operands) {
359 return parseRegister(Operands, RegGR, SystemZMC::GR32Regs, GR32Reg);
362 parseGRH32(SmallVectorImpl<MCParsedAsmOperand*> &Operands) {
363 return parseRegister(Operands, RegGR, SystemZMC::GRH32Regs, GRH32Reg);
366 parseGRX32(SmallVectorImpl<MCParsedAsmOperand*> &Operands) {
370 parseGR64(SmallVectorImpl<MCParsedAsmOperand*> &Operands) {
371 return parseRegister(Operands, RegGR, SystemZMC::GR64Regs, GR64Reg);
374 parseGR128(SmallVectorImpl<MCParsedAsmOperand*> &Operands) {
375 return parseRegister(Operands, RegGR, SystemZMC::GR128Regs, GR128Reg);
378 parseADDR32(SmallVectorImpl<MCParsedAsmOperand*> &Operands) {
379 return parseRegister(Operands, RegGR, SystemZMC::GR32Regs, ADDR32Reg);
382 parseADDR64(SmallVectorImpl<MCParsedAsmOperand*> &Operands) {
383 return parseRegister(Operands, RegGR, SystemZMC::GR64Regs, ADDR64Reg);
386 parseADDR128(SmallVectorImpl<MCParsedAsmOperand*> &Operands) {
390 parseFP32(SmallVectorImpl<MCParsedAsmOperand*> &Operands) {
391 return parseRegister(Operands, RegFP, SystemZMC::FP32Regs, FP32Reg);
394 parseFP64(SmallVectorImpl<MCParsedAsmOperand*> &Operands) {
395 return parseRegister(Operands, RegFP, SystemZMC::FP64Regs, FP64Reg);
398 parseFP128(SmallVectorImpl<MCParsedAsmOperand*> &Operands) {
399 return parseRegister(Operands, RegFP, SystemZMC::FP128Regs, FP128Reg);
402 parseBDAddr32(SmallVectorImpl<MCParsedAsmOperand*> &Operands) {
403 return parseAddress(Operands, SystemZMC::GR32Regs, ADDR32Reg, BDMem);
406 parseBDAddr64(SmallVectorImpl<MCParsedAsmOperand*> &Operands) {
407 return parseAddress(Operands, SystemZMC::GR64Regs, ADDR64Reg, BDMem);
410 parseBDXAddr64(SmallVectorImpl<MCParsedAsmOperand*> &Operands) {
411 return parseAddress(Operands, SystemZMC::GR64Regs, ADDR64Reg, BDXMem);
414 parseBDLAddr64(SmallVectorImpl<MCParsedAsmOperand*> &Operands) {
415 return parseAddress(Operands, SystemZMC::GR64Regs, ADDR64Reg, BDLMem);
418 parseAccessReg(SmallVectorImpl<MCParsedAsmOperand*> &Operands);
420 parsePCRel(SmallVectorImpl<MCParsedAsmOperand*> &Operands,
423 parsePCRel16(SmallVectorImpl<MCParsedAsmOperand*> &Operands) {
424 return parsePCRel(Operands, -(1LL << 16), (1LL << 16) - 1);
427 parsePCRel32(SmallVectorImpl<MCParsedAsmOperand*> &Operands) {
428 return parsePCRel(Operands, -(1LL << 32), (1LL << 32) - 1);
499 // Parse a register and add it to Operands. The other arguments are as above.
501 SystemZAsmParser::parseRegister(SmallVectorImpl<MCParsedAsmOperand*> &Operands,
512 Operands.push_back(SystemZOperand::createReg(Kind, Reg.Num,
567 // Parse a memory operand and add it to Operands. The other arguments
570 SystemZAsmParser::parseAddress(SmallVectorImpl<MCParsedAsmOperand*> &Operands,
600 Operands.push_back(SystemZOperand::createMem(RegKind, Base, Disp, Index,
628 SmallVectorImpl<MCParsedAsmOperand*> &Operands) {
629 Operands.push_back(SystemZOperand::createToken(Name, NameLoc));
634 if (parseOperand(Operands, Name)) {
642 if (parseOperand(Operands, Name)) {
660 parseOperand(SmallVectorImpl<MCParsedAsmOperand*> &Operands,
664 OperandMatchResultTy ResTy = MatchOperandParserImpl(Operands, Mnemonic);
682 Operands.push_back(SystemZOperand::createInvalid(Reg.StartLoc, Reg.EndLoc));
698 Operands.push_back(SystemZOperand::createInvalid(StartLoc, EndLoc));
700 Operands.push_back(SystemZOperand::createImm(Expr, StartLoc, EndLoc));
706 SmallVectorImpl<MCParsedAsmOperand*> &Operands,
712 MatchResult = MatchInstructionImpl(Operands, Inst, ErrorInfo,
740 if (ErrorInfo >= Operands.size())
743 ErrorLoc = ((SystemZOperand*)Operands[ErrorInfo])->getStartLoc();
758 parseAccessReg(SmallVectorImpl<MCParsedAsmOperand*> &Operands) {
766 Operands.push_back(SystemZOperand::createAccessReg(Reg.Num,
773 parsePCRel(SmallVectorImpl<MCParsedAsmOperand*> &Operands,
799 Operands.push_back(SystemZOperand::createImm(Expr, StartLoc, EndLoc));