Lines Matching refs:getReg
109 State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
134 State.addLoc(CCValAssign::getReg(ValNo, ValVT, SP::F0 + Offset/4,
150 State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
1033 NewVA = CCValAssign::getReg(VA.getValNo(), VA.getValVT(),
1279 if (SrcReg->getReg() == Reg && Chain->getOpcode() == ISD::CopyFromReg)
2959 BuildMI(*BB, BB->begin(), dl, TII.get(SP::PHI), MI->getOperand(0).getReg())
2960 .addReg(MI->getOperand(2).getReg()).addMBB(copy0MBB)
2961 .addReg(MI->getOperand(1).getReg()).addMBB(thisMBB);
2981 unsigned DestReg = MI->getOperand(0).getReg();
2982 unsigned AddrReg = MI->getOperand(1).getReg();
2983 unsigned Rs2Reg = MI->getOperand(2).getReg();