Target/R600/SIInstrInfo.cpp

1 //===-- SIInstrInfo.cpp - SI Instruction Information  ---------------------===//
16 #include "SIInstrInfo.h"
25 SIInstrInfo::SIInstrInfo(AMDGPUTargetMachine &tm)
30 const SIRegisterInfo &SIInstrInfo::getRegisterInfo() const {
39 SIInstrInfo::copyPhysReg(MachineBasicBlock &MBB,
174 unsigned SIInstrInfo::commuteOpcode(unsigned Opcode) const {
188 MachineInstr *SIInstrInfo::commuteInstruction(MachineInstr *MI,
228 MachineInstr *SIInstrInfo::buildMovInstr(MachineBasicBlock *MBB,
236 bool SIInstrInfo::isMov(unsigned Opcode) const {
248 SIInstrInfo::isSafeToMoveRegClassDefs(const TargetRegisterClass *RC) const {
252 int SIInstrInfo::isMIMG(uint16_t Opcode) const {
256 int SIInstrInfo::isSMRD(uint16_t Opcode) const {
260 bool SIInstrInfo::isVOP1(uint16_t Opcode) const {
264 bool SIInstrInfo::isVOP2(uint16_t Opcode) const {
268 bool SIInstrInfo::isVOP3(uint16_t Opcode) const {
272 bool SIInstrInfo::isVOPC(uint16_t Opcode) const {
276 bool SIInstrInfo::isSALUInstr(const MachineInstr &MI) const {
280 bool SIInstrInfo::isInlineConstant(const MachineOperand &MO) const {
298 bool SIInstrInfo::isLiteralConstant(const MachineOperand &MO) const {
302 bool SIInstrInfo::verifyInstruction(const MachineInstr *MI,
370 unsigned SIInstrInfo::getVALUOp(const MachineInstr &MI) {
389 bool SIInstrInfo::isSALUOpSupportedOnVALU(const MachineInstr &MI) const {
393 const TargetRegisterClass *SIInstrInfo::getOpRegClass(const MachineInstr &MI,
405 bool SIInstrInfo::canReadVGPR(const MachineInstr &MI, unsigned OpNo) const {
415 void SIInstrInfo::legalizeOpWithMove(MachineInstr *MI, unsigned OpIdx) const {
435 void SIInstrInfo::legalizeOperands(MachineInstr *MI) const {
554 void SIInstrInfo::moveToVALU(MachineInstr &TopInst) const {
635 unsigned SIInstrInfo::calculateIndirectAddress(unsigned RegIndex,
641 const TargetRegisterClass *SIInstrInfo::getIndirectAddrRegClass() const {
645 MachineInstrBuilder SIInstrInfo::buildIndirectWrite(
663 MachineInstrBuilder SIInstrInfo::buildIndirectRead(
681 void SIInstrInfo::reserveIndirectRegisters(BitVector &Reserved,