Target/ARM/ARMExpandPseudoInsts.cpp

385   MachineInstrBuilder MIB = BuildMI(MBB, MBBI, MI.getDebugLoc(),
393   MIB.addReg(D0, RegState::Define | getDeadRegState(DstIsDead));
395     MIB.addReg(D1, RegState::Define | getDeadRegState(DstIsDead));
397     MIB.addReg(D2, RegState::Define | getDeadRegState(DstIsDead));
399     MIB.addReg(D3, RegState::Define | getDeadRegState(DstIsDead));
402     MIB.addOperand(MI.getOperand(OpIdx++));
405   MIB.addOperand(MI.getOperand(OpIdx++));
406   MIB.addOperand(MI.getOperand(OpIdx++));
409     MIB.addOperand(MI.getOperand(OpIdx++));
419   MIB.addOperand(MI.getOperand(OpIdx++));
420   MIB.addOperand(MI.getOperand(OpIdx++));
427     MIB.addOperand(MO);
430   MIB.addReg(DstReg, RegState::ImplicitDefine | getDeadRegState(DstIsDead));
431   TransferImpOps(MI, MIB, MIB);
434   MIB->setMemRefs(MI.memoperands_begin(), MI.memoperands_end());
450   MachineInstrBuilder MIB = BuildMI(MBB, MBBI, MI.getDebugLoc(),
454     MIB.addOperand(MI.getOperand(OpIdx++));
457   MIB.addOperand(MI.getOperand(OpIdx++));
458   MIB.addOperand(MI.getOperand(OpIdx++));
461     MIB.addOperand(MI.getOperand(OpIdx++));
468   MIB.addReg(D0, getUndefRegState(SrcIsUndef));
470     MIB.addReg(D1, getUndefRegState(SrcIsUndef));
472     MIB.addReg(D2, getUndefRegState(SrcIsUndef));
474     MIB.addReg(D3, getUndefRegState(SrcIsUndef));
477   MIB.addOperand(MI.getOperand(OpIdx++));
478   MIB.addOperand(MI.getOperand(OpIdx++));
481     MIB->addRegisterKilled(SrcReg, TRI, true);
482   TransferImpOps(MI, MIB, MIB);
485   MIB->setMemRefs(MI.memoperands_begin(), MI.memoperands_end());
502   MachineInstrBuilder MIB = BuildMI(MBB, MBBI, MI.getDebugLoc(),
524     MIB.addReg(D0, RegState::Define | getDeadRegState(DstIsDead));
526       MIB.addReg(D1, RegState::Define | getDeadRegState(DstIsDead));
528       MIB.addReg(D2, RegState::Define | getDeadRegState(DstIsDead));
530       MIB.addReg(D3, RegState::Define | getDeadRegState(DstIsDead));
534     MIB.addOperand(MI.getOperand(OpIdx++));
537   MIB.addOperand(MI.getOperand(OpIdx++));
538   MIB.addOperand(MI.getOperand(OpIdx++));
541     MIB.addOperand(MI.getOperand(OpIdx++));
551   MIB.addReg(D0, SrcFlags);
553     MIB.addReg(D1, SrcFlags);
555     MIB.addReg(D2, SrcFlags);
557     MIB.addReg(D3, SrcFlags);
560   MIB.addImm(Lane);
564   MIB.addOperand(MI.getOperand(OpIdx++));
565   MIB.addOperand(MI.getOperand(OpIdx++));
569   MIB.addOperand(MO);
572     MIB.addReg(DstReg, RegState::ImplicitDefine | getDeadRegState(DstIsDead));
573   TransferImpOps(MI, MIB, MIB);
575   MIB->setMemRefs(MI.memoperands_begin(), MI.memoperands_end());
586   MachineInstrBuilder MIB = BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(Opc));
590   MIB.addOperand(MI.getOperand(OpIdx++));
592     MIB.addOperand(MI.getOperand(OpIdx++));
598   MIB.addReg(D0);
601   MIB.addOperand(MI.getOperand(OpIdx++));
604   MIB.addOperand(MI.getOperand(OpIdx++));
605   MIB.addOperand(MI.getOperand(OpIdx++));
608     MIB->addRegisterKilled(SrcReg, TRI, true);
609   TransferImpOps(MI, MIB, MIB);
860       MachineInstrBuilder MIB =
866       TransferImpOps(MI, MIB, MIB);
872       MachineInstrBuilder MIB =
877       MIB->setMemRefs(MI.memoperands_begin(), MI.memoperands_end());
878       TransferImpOps(MI, MIB, MIB);
963       MachineInstrBuilder MIB =
970       TransferImpOps(MI, MIB, MIB);
976       MachineInstrBuilder MIB =
985       MIB.addOperand(MI.getOperand(OpIdx++));
988       MIB.addOperand(MI.getOperand(OpIdx++));
989       MIB.addOperand(MI.getOperand(OpIdx++));
994       MIB.addReg(D0, RegState::Define | getDeadRegState(DstIsDead))
998       MIB.addReg(DstReg, RegState::ImplicitDefine | getDeadRegState(DstIsDead));
999       TransferImpOps(MI, MIB, MIB);
1000       MIB.setMemRefs(MI.memoperands_begin(), MI.memoperands_end());
1007       MachineInstrBuilder MIB =
1016       MIB.addOperand(MI.getOperand(OpIdx++));
1019       MIB.addOperand(MI.getOperand(OpIdx++));
1020       MIB.addOperand(MI.getOperand(OpIdx++));
1025       MIB.addReg(D0).addReg(D1);
1028         MIB->addRegisterKilled(SrcReg, TRI, true);
1030       TransferImpOps(MI, MIB, MIB);
1031       MIB.setMemRefs(MI.memoperands_begin(), MI.memoperands_end());
1039       MachineInstrBuilder MIB =
1049       MIB.addOperand(MI.getOperand(OpIdx++));
1050       MIB.addReg(DReg);
1053       MIB.addImm(Lane);
1055       MIB.addOperand(MI.getOperand(OpIdx++));
1056       MIB.addOperand(MI.getOperand(OpIdx++));
1058       TransferImpOps(MI, MIB, MIB);